summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
Commit message (Expand)AuthorAgeFilesLines
* Fix some typos and use type-based isel for VZIP/VUZP/VTRNAnton Korobeynikov2009-08-211-21/+42
* Add nodes & dummy matchers for some v{zip,uzp,trn} instructionsAnton Korobeynikov2009-08-211-0/+30
* Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these asBob Wilson2009-08-211-57/+0
* Indentation.Evan Cheng2009-08-141-1/+1
* During legalization, change Neon vdup_lane operations from shuffles toBob Wilson2009-08-141-41/+0
* Push LLVMContexts through the IntegerType APIs.Owen Anderson2009-08-131-1/+2
* Shrink Thumb2 movcc instructions.Evan Cheng2009-08-121-1/+1
* Add missing chain operands for VLD* and VST* instructions.Bob Wilson2009-08-121-12/+18
* Shrinkify Thumb2 r = add sp, imm.Evan Cheng2009-08-111-1/+1
* Split EVT into MVT and EVT, the former representing _just_ a primitive type, ...Owen Anderson2009-08-111-200/+200
* Whitespace cleanup. Remove trailing whitespace.Jim Grosbach2009-08-111-25/+25
* Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form toEvan Cheng2009-08-111-38/+31
* Use vAny type to get rid of Neon intrinsics that differed only in whetherBob Wilson2009-08-111-6/+3
* Fix a bug where DAGCombine was producing an illegal ConstantFPDan Gohman2009-08-101-18/+0
* Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ...Owen Anderson2009-08-101-206/+206
* Handle the constantfp created during post-legalization dag combiner phase.Evan Cheng2009-08-101-0/+18
* Use VLDM / VSTM to spill/reload 128-bit Neon registersAnton Korobeynikov2009-08-081-0/+8
* Implement Neon VZIP and VUZP instructions. These are very similar to VTRN,Bob Wilson2009-08-081-0/+33
* Implement Neon VTRN instructions. For now, anyway, these are selectedBob Wilson2009-08-081-0/+27
* It turns out most of the thumb2 instructions are not allowed to touch SP. The...Evan Cheng2009-08-071-19/+57
* Implement Neon VST[234] operations.Bob Wilson2009-08-061-6/+59
* Neon does not actually have VLD{234}.64 instructions.Bob Wilson2009-08-061-3/+0
* Change DAG nodes for Neon VLD2/3/4 operations to return multiple results.Bob Wilson2009-08-051-1/+57
* Lower CONCAT_VECTOR during legalization instead of matching it during isel.Bob Wilson2009-08-031-21/+0
* Split t2MOVCCs since some assemblers do not recognize mov shifted register al...Evan Cheng2009-08-011-3/+16
* Remove redundant match for frame index from imm8 addrmode, it is handled by t...David Goodwin2009-07-301-24/+14
* Cleanup and include code selection for some frame index cases.David Goodwin2009-07-301-20/+49
* Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a ...Evan Cheng2009-07-261-1/+1
* Revert the ConstantInt constructors back to their 2.5 forms where possible, t...Owen Anderson2009-07-241-2/+1
* Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...David Goodwin2009-07-241-1/+1
* Use getTargetConstant instead of getConstant since it's meant as an constant ...Evan Cheng2009-07-221-2/+2
* Eliminate a redudant check Eli pointed out.Evan Cheng2009-07-221-2/+2
* Fix ARM isle code that optimize multiply by constants which are power-of-2 +/...Evan Cheng2009-07-211-16/+26
* Use t2LDRri12 for frame index loads.David Goodwin2009-07-201-3/+11
* Thumb-2 only support [base_reg + offset_reg] addressing, not [base_reg - offs...David Goodwin2009-07-151-13/+16
* Move EVER MORE stuff over to LLVMContext.Owen Anderson2009-07-141-1/+3
* Check for PRE_INC and POST_INC.David Goodwin2009-07-141-1/+1
* hasThumb2() does not mean we are compiling for thumb, must also check isThumb().David Goodwin2009-07-141-3/+6
* Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is f...Evan Cheng2009-07-111-10/+5
* Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...Evan Cheng2009-07-111-10/+16
* Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. A...Evan Cheng2009-07-091-1/+2
* Use common code for both ARM and Thumb-2 instruction and register info.David Goodwin2009-07-081-6/+9
* Change how so_imm and t2_so_imm are handled. At instruction selection time, t...Evan Cheng2009-07-081-4/+2
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-0/+3
* Add Thumb2 movcc instructions.Evan Cheng2009-07-071-34/+64
* Add some more Thumb2 multiplication instructions.Evan Cheng2009-07-071-6/+23
* Sign extending pre/post indexed loads.Evan Cheng2009-07-021-2/+10
* Thumb2 pre/post indexed loads.Evan Cheng2009-07-021-1/+70
* Factor out ARM indexed load matching code.Evan Cheng2009-07-021-46/+57
* Add a new addressing mode for NEON load/store instructions.Bob Wilson2009-07-011-2/+13
OpenPOWER on IntegriCloud