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path: root/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
Commit message (Expand)AuthorAgeFilesLines
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-1/+1
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+1
* ARM: spot SBFX-compatbile code expressed with sign_extend_inregTim Northover2014-07-231-0/+20
* Move function dependent resetting of a subtarget variable out of theEric Christopher2014-07-041-1/+1
* Remove caching of the target machine and initialization of theEric Christopher2014-07-031-10/+5
* Override runOnMachineFunction for ARMISelDAGToDAG so that we canEric Christopher2014-05-221-0/+7
* Convert more SelectionDAG functions to use ArrayRef.Craig Topper2014-04-281-1/+1
* Convert SelectionDAG::SelectNodeTo to use ArrayRef.Craig Topper2014-04-271-11/+11
* Convert SelectionDAG::getNode methods to use ArrayRef<SDValue>.Craig Topper2014-04-261-2/+1
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-39/+40
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* Tidy up. Trailing whitespace.Jim Grosbach2014-04-031-5/+5
* ARM: expand atomic ldrex/strex loops in IRTim Northover2014-04-031-113/+0
* ARM: teach LLVM that Cortex-A7 is very similar to A8.Tim Northover2014-04-011-2/+2
* ARM: add intrinsics for the v8 ldaex/stlexTim Northover2014-03-261-5/+10
* Prune includes in ARM target.Craig Topper2014-03-221-1/+0
* ARM: simplify EmitAtomicBinary64Tim Northover2014-03-111-6/+0
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-101-6/+5
* Fix known typosAlp Toker2014-01-241-1/+1
* ARM: use litpools for normal i32 imms when compiling minsize.Tim Northover2014-01-231-9/+11
* For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback.Jiangning Liu2014-01-161-9/+66
* ARM: add pseudo-instructions for lit-pool global materialisationTim Northover2013-12-021-10/+5
* [ARM] Use the load-acquire/store-release instructions optimally in AArch32.Amara Emerson2013-09-261-42/+114
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-221-1/+3
* ARM: use TableGen patterns to select CMOV operations.Tim Northover2013-08-221-215/+7
* ARM: make sure we keep inline asm operands tied.Tim Northover2013-08-181-1/+4
* Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patc...Silviu Baranga2013-07-291-1/+1
* ARM: implement ldrex, strex and clrex intrinsicsTim Northover2013-07-161-0/+29
* Add a comment to this change, requested by Eric Christopher.Joey Gouly2013-07-081-0/+4
* PR16490: fix a crash in ARMDAGToDAGISel::SelectInlineAsm.Joey Gouly2013-07-051-0/+6
* Remove unused variables.Eric Christopher2013-06-281-4/+0
* Bug 13662: Enable GPRPair for all i64 operands of inline asm on ARMWeiming Zhao2013-06-281-10/+23
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-17/+32
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-061-15/+15
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-251-26/+26
* Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.Michael J. Spencer2013-05-241-1/+1
* ArrayRefize getMachineNode(). No functionality change.Michael Liao2013-04-191-48/+40
* Don't glue users to extract_subreg when selecting the llvm.arm.ldrexdLang Hames2013-03-091-6/+4
* ArrayRefize some code. No functionality change.Benjamin Kramer2013-03-071-3/+1
* Re-apply r175088 for bug fix 13622: Add paired register support forWeiming Zhao2013-02-141-0/+141
* temporarily revert the patch due to some conflictsWeiming Zhao2013-02-131-141/+0
* Bug fix 13622: Add paired register support for inline asm with 64-bit data on...Weiming Zhao2013-02-131-0/+141
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-6/+6
* LLVM sdisel normalize bit extraction of the form:Evan Cheng2012-12-191-2/+107
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-7/+7
* Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.Silviu Baranga2012-11-291-0/+9
* Rename methods like PairSRegs() to createSRegpairNode() to meet our codingWeiming Zhao2012-11-171-40/+34
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-161-43/+51
* Add LLVM support for Swift.Bob Wilson2012-09-291-8/+13
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru2012-09-271-1/+1
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