| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Remove fixup_arm_thumb_ldst. The code was never calling the "fixup" stuff for | Bill Wendling | 2010-12-16 | 1 | -3/+0 |
| | | | | | | | it. I.e., it was always an immediate value. llvm-svn: 121932 | ||||
| * | Add fixups for Thumb LDR/STR instructions. | Bill Wendling | 2010-12-15 | 1 | -0/+3 |
| | | | | | llvm-svn: 121858 | ||||
| * | Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755 | Jim Grosbach | 2010-12-14 | 1 | -0/+4 |
| | | | | | llvm-svn: 121798 | ||||
| * | Fix comment. | Bill Wendling | 2010-12-14 | 1 | -1/+1 |
| | | | | | llvm-svn: 121797 | ||||
| * | trailing whitespace | Jim Grosbach | 2010-12-14 | 1 | -4/+4 |
| | | | | | llvm-svn: 121792 | ||||
| * | Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ↵ | Owen Anderson | 2010-12-14 | 1 | -0/+3 |
| | | | | | | | | | much later, which makes the entire process cleaner. llvm-svn: 121735 | ||||
| * | Revert r121721, which broke buildbots. | Owen Anderson | 2010-12-13 | 1 | -3/+0 |
| | | | | | llvm-svn: 121726 | ||||
| * | Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. ↵ | Owen Anderson | 2010-12-13 | 1 | -0/+3 |
| | | | | | | | | | Provide correct fixups for Thumb2 ADR, which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup. llvm-svn: 121721 | ||||
| * | In Thumb2, direct branches can be encoded as either a "short" conditional ↵ | Owen Anderson | 2010-12-13 | 1 | -3/+6 |
| | | | | | | | | | | | branch with a null predicate, or as a "long" direct branch. While the mnemonics are the same, they encode the branch offset differently, and the Darwin assembler appears to prefer the "long" form for direct branches. Thus, in the name of bitwise equivalence, provide encoding and fixup support for it. llvm-svn: 121710 | ||||
| * | Thumb unconditional branch binary encoding. rdar://8754994 | Jim Grosbach | 2010-12-10 | 1 | -0/+3 |
| | | | | | llvm-svn: 121496 | ||||
| * | Thumb conditional branch binary encodings. rdar://8745367 | Jim Grosbach | 2010-12-10 | 1 | -0/+3 |
| | | | | | llvm-svn: 121493 | ||||
| * | Rename CB/CBZ specific fixup accordingly. | Jim Grosbach | 2010-12-09 | 1 | -2/+2 |
| | | | | | llvm-svn: 121404 | ||||
| * | Fix Thumb2 fixups for ldr. | Owen Anderson | 2010-12-09 | 1 | -0/+5 |
| | | | | | llvm-svn: 121350 | ||||
| * | The BLX instruction is encoded differently than the BL, because why not? In | Bill Wendling | 2010-12-09 | 1 | -1/+4 |
| | | | | | | | | | | | particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0' always. Going through the BL fixup encoding was trashing the "bit 0 is '0'" invariant. Attempt to get the encoding at slightly more correct with this. llvm-svn: 121336 | ||||
| * | Fix Thumb2 BCC encoding and fixups. | Owen Anderson | 2010-12-09 | 1 | -1/+4 |
| | | | | | llvm-svn: 121329 | ||||
| * | Support the "target" encodings for the CB[N]Z instructions. | Bill Wendling | 2010-12-08 | 1 | -0/+4 |
| | | | | | llvm-svn: 121308 | ||||
| * | Add support for loading from a constant pool. | Bill Wendling | 2010-12-08 | 1 | -0/+3 |
| | | | | | llvm-svn: 121226 | ||||
| * | VLDR fixups need special handling under Thumb. While the encoding is the same, | Owen Anderson | 2010-12-08 | 1 | -1/+4 |
| | | | | | | | the order of the bytes in the data stream is flipped around. llvm-svn: 121215 | ||||
| * | Add fixup for Thumb1 BL/BLX instructions. | Jim Grosbach | 2010-12-06 | 1 | -1/+3 |
| | | | | | llvm-svn: 121072 | ||||
| * | Add support for binary encoding of ARM 'adr' instructions referencing constant | Jim Grosbach | 2010-12-02 | 1 | -2/+6 |
| | | | | | | | pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291. llvm-svn: 120635 | ||||
| * | Add correct encodings for STRD and LDRD, including fixup support. ↵ | Owen Anderson | 2010-12-01 | 1 | -4/+4 |
| | | | | | | | Additionally, update these to unified syntax. llvm-svn: 120589 | ||||
| * | 10 bits, not 12. | Jim Grosbach | 2010-12-01 | 1 | -2/+2 |
| | | | | | llvm-svn: 120584 | ||||
| * | Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the ↵ | Jason W Kim | 2010-11-18 | 1 | -0/+6 |
| | | | | | | | | | | .o path now works for ARM. Note: lo16AllZero remains in ARMInstrInfo.td - It can be factored out when Thumb movt is repaired. Existing tests cover this update. llvm-svn: 119760 | ||||
| * | Encoding of destination fixup for ARM branch and conditional branch | Jim Grosbach | 2010-11-11 | 1 | -1/+8 |
| | | | | | | | instructions. llvm-svn: 118801 | ||||
| * | Add ARM fixup info for load/store label references. Probably will need a bit of | Jim Grosbach | 2010-11-04 | 1 | -0/+28 |
| tweaking when we start using it for object file emission or JIT, but it's a start. llvm-svn: 118221 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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