summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMFastISel.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* When a block ends in an indirect branch, add its successors to the machine ↵Bill Wendling2012-10-221-0/+5
| | | | | | | | | | basic block. The CFG of the machine function needs to know that the targets of the indirect branch are successors to the indirect branch. <rdar://problem/12529625> llvm-svn: 166448
* Use the attribute enums to query if a parameter has an attribute.Bill Wendling2012-10-091-6/+6
| | | | llvm-svn: 165550
* Move TargetData to DataLayout.Micah Villmow2012-10-081-1/+1
| | | | llvm-svn: 165402
* Add methods which query for the specific attribute instead of using theBill Wendling2012-10-031-6/+6
| | | | | | enums. This allows for better encapsulation of the Attributes class. llvm-svn: 165132
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. ↵Sylvestre Ledru2012-09-271-1/+1
| | | | | | See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 llvm-svn: 164768
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-271-1/+1
| | | | llvm-svn: 164767
* [arm-fast-isel] Add support for ELF PIC.Jush Lu2012-09-271-0/+45
| | | | | | | This is a preliminary step towards ELF support; currently ARMFastISel hasn't been used for ELF object files yet. llvm-svn: 164759
* [fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier2012-09-211-0/+6
| | | | | | | non-aligned i32 loads/stores. rdar://12304911 llvm-svn: 164381
* [fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier2012-09-211-0/+6
| | | | | | | non-halfword-aligned i16 loads/stores. rdar://12304911 llvm-svn: 164345
* Fix a few old-GCC warnings. No functional change.Nadav Rotem2012-09-061-1/+1
| | | | llvm-svn: 163309
* [arm-fast-isel] Add support for ARM PIC.Jush Lu2012-08-291-6/+16
| | | | llvm-svn: 162823
* Fix call instruction operands in ARMFastISel.Jakob Stoklund Olesen2012-08-241-34/+16
| | | | | | | | | The ARM BL and BLX instructions don't have predicate operands, but the thumb variants tBL and tBLX do. The argument registers should be added as implicit uses. llvm-svn: 162593
* Remove virtual from many methods. These methods replace methods in the base ↵Craig Topper2012-08-181-38/+40
| | | | | | class, but the base class methods aren't virtual so it just increased call overhead. llvm-svn: 162178
* [arm-fast-isel] Add support for fastcc.Jush Lu2012-08-161-3/+6
| | | | | | | | Without fastcc support, the caller just falls through to CallingConv::C for fastcc, but callee still uses fastcc, this inconsistency of calling convention is a problem, and fastcc support can fix it. llvm-svn: 162013
* Fall back to selection DAG isel for calls to builtin functions.Bob Wilson2012-08-031-4/+6
| | | | | | | | | | Fast isel doesn't currently have support for translating builtin function calls to target instructions. For embedded environments where the library functions are not available, this is a matter of correctness and not just optimization. Most of this patch is just arranging to make the TargetLibraryInfo available in fast isel. <rdar://problem/12008746> llvm-svn: 161232
* [arm-fast-isel] Add support for shl, lshr, and ashr.Jush Lu2012-08-031-0/+62
| | | | llvm-svn: 161230
* Add support for the ARM GHC calling convention, this patch was in 3.0,Eric Christopher2012-08-031-0/+5
| | | | | | | | but somehow managed to be dropped later. Patch by Karel Gardas. llvm-svn: 161226
* [arm-fast-isel] Add support for vararg function calls.Jush Lu2012-07-191-28/+36
| | | | llvm-svn: 160500
* Revert r159804, "[arm-fast-isel] Add support for vararg function calls."NAKAMURA Takumi2012-07-061-33/+26
| | | | | | It broke LLVM :: CodeGen/Thumb2/large-call.ll on several hosts. llvm-svn: 159817
* [arm-fast-isel] Add support for vararg function calls.Jush Lu2012-07-061-26/+33
| | | | llvm-svn: 159804
* Cleanup whitespace.Jush Lu2012-06-141-13/+12
| | | | llvm-svn: 158443
* [arm-fast-isel] Add support for -arm-long-calls.Chad Rosier2012-06-121-41/+57
| | | | | | Patch by Jush Lu <jush.msn@gmail.com>. llvm-svn: 158368
* Re-enable the CMN instruction.Bill Wendling2012-06-111-2/+2
| | | | | | | | | We turned off the CMN instruction because it had semantics which we weren't getting correct. If we are comparing with an immediate, then it's okay to use the CMN instruction. <rdar://problem/7569620> llvm-svn: 158302
* [arm-fast-isel] Fix handling of the frameaddress intrinsic. If depth is 0Chad Rosier2012-06-011-1/+1
| | | | | | then DestReg is undefined. llvm-svn: 157840
* [arm-fast-isel] Add support for the llvm.frameaddress() intrinsic.Chad Rosier2012-05-301-0/+36
| | | | | | Patch by Jush Lu <jush.msn@gmail.com>. llvm-svn: 157696
* [arm-fast-isel] Add support for non-global callee.Chad Rosier2012-05-231-7/+17
| | | | | | Patch by Jush Lu <jush.msn@gmail.com>. llvm-svn: 157336
* [fast-isel] Add support for selecting @llvm.trap().Chad Rosier2012-05-111-0/+4
| | | | llvm-svn: 156646
* [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. ↵Chad Rosier2012-05-111-12/+2
| | | | | | Minor cleanup. llvm-svn: 156632
* [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier2012-05-111-4/+21
| | | | | | | | retval. Hoists check before emitting the call to avoid unnecessary work. rdar://11430407 PR12796 llvm-svn: 156628
* [fast-isel] Rather then assert (or segfault in a non-asserts build), fall backChad Rosier2012-05-111-2/+4
| | | | | | | | to selection DAG isel if we're unable to handle a non-double multi-reg retval. rdar://11430407 PR12796 llvm-svn: 156622
* The return type is an unsigned, not a bool.Chad Rosier2012-05-111-1/+1
| | | | llvm-svn: 156621
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-201-12/+15
| | | | | | since they are equivalent. llvm-svn: 155188
* Tidy up. 80 columns.Jim Grosbach2012-04-061-1/+2
| | | | llvm-svn: 154226
* Deduplicate ARM call-related instructions.Jakob Stoklund Olesen2012-04-061-9/+4
| | | | | | | | We had special instructions for iOS because r9 is call-clobbered, but that is represented dynamically by the register mask operands now, so there is no need for the pseudo-instructions. llvm-svn: 154144
* Remove unnecessary llvm:: qualificationsCraig Topper2012-03-271-1/+1
| | | | llvm-svn: 153500
* Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.hCraig Topper2012-03-261-1/+0
| | | | llvm-svn: 153422
* Check if we can handle the arguments of a call (and therefore the call) inBill Wendling2012-03-161-8/+52
| | | | | | | | | | fast-isel before emitting code. If the program bails after code was emitted, then it could lead to the stack being adjusted more than once (two CALLSEQ_BEGINs emitted) but being adjuste back only once after the call. This leads to general badness and gnashing of teeth. <rdar://problem/11050630> llvm-svn: 152959
* [fast-isel] Address Eli's comments for r152847. Specifically, add a test caseChad Rosier2012-03-151-9/+8
| | | | | | | and still allow immediate encoding, just not with cmn. rdar://11038907 llvm-svn: 152869
* [fast-isel] Don't try to encode LONG_MIN using cmn instructions.Chad Rosier2012-03-151-5/+9
| | | | | | rdar://11038907 llvm-svn: 152847
* [fast-isel] ARMEmitCmp generates FMSTAT, which transfers the floating-point Chad Rosier2012-03-071-4/+2
| | | | | | | condition flags to CPSR. This allows us to simplify SelectCmp. Patch by Zonr Chang <zonr.xchg@gmail.com>. llvm-svn: 152243
* Split fpscr into two registers: FPSCR and FPSCR_NZCV.Lang Hames2012-03-061-1/+1
| | | | | | | | | The fpscr register contains both flags (set by FP operations/comparisons) and control bits. The control bits (FPSCR) should be reserved, since they're always available and needn't be defined before use. The flag bits (FPSCR_NZCV) should like to be unreserved so they can be hoisted by MachineCSE. This fixes PR12165. llvm-svn: 152076
* ARM use the right opcode for FP<->Integer move in fast-isel.Jim Grosbach2012-03-011-2/+2
| | | | | | rdar://10965031 llvm-svn: 151850
* Switch ARM target to register masks.Jakob Stoklund Olesen2012-02-241-0/+8
| | | | | | | | | | | | | I'll let the buildbots determine the compile time improvements from this change, but 464.h264ref has 5% faster codegen at -O2. This patch does cause some assembly changes. Branch folding can make different decisions about calls with dead return values. CriticalAntiDepBreaker may choose different registers because its liveness tracking is affected. MachineCopyPropagation may sometimes leave a dead copy behind. llvm-svn: 151331
* Make all pointers to TargetRegisterClass const since they are all pointers ↵Craig Topper2012-02-221-8/+8
| | | | | | to static data that should not be modified. llvm-svn: 151134
* [fast-isel] Add support for returning non-legal types with no sign- or zero-Chad Rosier2012-02-171-6/+6
| | | | | | entend flag. llvm-svn: 150774
* Remove unnecessary assignment to temporary, ResultReg.Chad Rosier2012-02-161-13/+8
| | | | llvm-svn: 150737
* Add braces to if clause to make symmetric with associate else clause.Chad Rosier2012-02-151-18/+19
| | | | llvm-svn: 150591
* Use a temporary variable, rather then a series of redundant calls.Chad Rosier2012-02-151-4/+5
| | | | llvm-svn: 150536
* Remove unnecessary assignment to temporary, ResultReg.Chad Rosier2012-02-141-8/+4
| | | | llvm-svn: 150520
* [fast-isel] Add support for SUBs with non-legal types.Chad Rosier2012-02-081-0/+5
| | | | llvm-svn: 150047
OpenPOWER on IntegriCloud