| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add support for ARM halfword load/stores and signed byte loads with negative | Chad Rosier | 2011-11-14 | 1 | -8/+15 |
| * | The order in which the predicate is added differs between Thumb and ARM mode.... | Chad Rosier | 2011-11-13 | 1 | -10/+16 |
| * | Temporarily disable SelectIntrinsicCall when in ARM mode. This is causing fai... | Chad Rosier | 2011-11-13 | 1 | -0/+1 |
| * | Fix comments. | Chad Rosier | 2011-11-13 | 1 | -3/+3 |
| * | Add support for emitting both signed- and zero-extend loads. Fix | Chad Rosier | 2011-11-13 | 1 | -32/+91 |
| * | Add support in fast-isel for selecting memset/memcpy/memmove intrinsics. | Chad Rosier | 2011-11-11 | 1 | -10/+60 |
| * | Rename variables to avoid confusion. No functionallity change intended. | Chad Rosier | 2011-11-11 | 1 | -18/+18 |
| * | Add support for using immediates with select instructions. | Chad Rosier | 2011-11-11 | 1 | -8/+40 |
| * | When loading a value, treat an i1 as an i8. | Chad Rosier | 2011-11-11 | 1 | -0/+1 |
| * | Add support for using MVN to materialize negative constants. | Chad Rosier | 2011-11-11 | 1 | -3/+17 |
| * | When in ARM mode, LDRH/STRH require special handling of negative offsets. | Chad Rosier | 2011-11-10 | 1 | -1/+2 |
| * | For immediate encodings of icmp, zero or sign extend first. Then | Chad Rosier | 2011-11-10 | 1 | -5/+5 |
| * | The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12. | Chad Rosier | 2011-11-09 | 1 | -5/+13 |
| * | Add support for encoding immediates in icmp and fcmp. Hopefully, this will | Chad Rosier | 2011-11-09 | 1 | -12/+64 |
| * | ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this. | Chad Rosier | 2011-11-08 | 1 | -39/+39 |
| * | Enable support for returning i1, i8, and i16. Nothing special todo as it's the | Chad Rosier | 2011-11-08 | 1 | -1/+7 |
| * | Add support for passing i1, i8, and i16 call parameters. Also, be sure to | Chad Rosier | 2011-11-05 | 1 | -28/+16 |
| * | Cannot create a result register for non-legal types. | Chad Rosier | 2011-11-04 | 1 | -1/+2 |
| * | When materializing an i32, SExt vs ZExt doesn't matter when we're trying to fit | Chad Rosier | 2011-11-04 | 1 | -1/+1 |
| * | Enable support for materializing i1, i8, and i16 integers via move immediate. | Chad Rosier | 2011-11-04 | 1 | -6/+11 |
| * | Indentation. | Chad Rosier | 2011-11-04 | 1 | -1/+1 |
| * | Add fast-isel support for returning i1, i8, and i16. | Chad Rosier | 2011-11-04 | 1 | -6/+19 |
| * | Add support for sign-extending non-legal types in SelectSIToFP(). | Chad Rosier | 2011-11-03 | 1 | -5/+14 |
| * | Add support for comparing integer non-legal types. | Chad Rosier | 2011-11-02 | 1 | -16/+33 |
| * | Factor out an EmitIntExt function. No functionality change intended. | Chad Rosier | 2011-11-02 | 1 | -31/+37 |
| * | Factor out a SelectTrunc function. No functionality change intended. | Chad Rosier | 2011-11-02 | 1 | -17/+28 |
| * | A branch predicated on a constant can just FastEmit an unconditional branch. | Chad Rosier | 2011-10-27 | 1 | -0/+6 |
| * | Add a TODO comment. FastISel works by parsing each basic block from the bottom | Chad Rosier | 2011-10-26 | 1 | -0/+1 |
| * | Factor a little more code into EmitCmp, which should have been done in the first | Chad Rosier | 2011-10-26 | 1 | -23/+16 |
| * | Use EmitCmp in SelectBranch. No functional change intended. | Chad Rosier | 2011-10-26 | 1 | -33/+6 |
| * | Factor out an EmitCmp function that can be used by both SelectCmp and | Chad Rosier | 2011-10-26 | 1 | -18/+24 |
| * | Add a few FIXME comments. | Chad Rosier | 2011-10-17 | 1 | -0/+2 |
| * | Switch over to using ARMConstantPoolConstant for global variables, functions, | Bill Wendling | 2011-10-01 | 1 | -2/+3 |
| * | ARM fix encoding of VMOV.f32 and VMOV.f64 immediates. | Jim Grosbach | 2011-09-30 | 1 | -2/+10 |
| * | Tidy up a few 80 column violations. | Jim Grosbach | 2011-09-13 | 1 | -3/+3 |
| * | Don't fast-isel for atomic load/store; some cases require extra handling miss... | Eli Friedman | 2011-09-02 | 1 | -0/+8 |
| * | Fixup for functions that return a bool. | Chad Rosier | 2011-08-31 | 1 | -2/+2 |
| * | [SU]XT[BH] are only available on ARMv6 and up. | Jim Grosbach | 2011-08-23 | 1 | -0/+2 |
| * | ARM extend instructions simplification. | Jim Grosbach | 2011-07-27 | 1 | -4/+6 |
| * | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -1/+1 |
| * | land David Blaikie's patch to de-constify Type, with a few tweaks. | Chris Lattner | 2011-07-18 | 1 | -22/+22 |
| * | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng | 2011-06-28 | 1 | -2/+2 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -15/+15 |
| * | Add a parameter to CCState so that it can access the MachineFunction. | Eric Christopher | 2011-06-08 | 1 | -6/+6 |
| * | Add ARM fast-isel support for materializing the address of a global in cases ... | Eli Friedman | 2011-06-03 | 1 | -3/+17 |
| * | Fix ARM fast isel to correctly flag memory operands to stores. This fixes | Cameron Zwarich | 2011-05-28 | 1 | -5/+7 |
| * | Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076 | Eli Friedman | 2011-05-27 | 1 | -0/+2 |
| * | Rewrite fast-isel integer cast handling to handle more cases, and to be simpl... | Eli Friedman | 2011-05-25 | 1 | -1/+77 |
| * | Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for ... | Eli Friedman | 2011-05-25 | 1 | -0/+4 |
| * | Kill some dead code. | Jim Grosbach | 2011-05-16 | 1 | -3/+1 |
