| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Encode the conditional execution predicate when JITing. | Jim Grosbach | 2008-10-07 | 1 | -10/+10 |
| | | | | | llvm-svn: 57258 | ||||
| * | Clarify naming and correct conditional so that CMP and CMN instructions get ↵ | Jim Grosbach | 2008-10-07 | 1 | -8/+5 |
| | | | | | | | the Rn operand encoded properly llvm-svn: 57252 | ||||
| * | Indexing off by one resulted in errant encoding of source register for | Jim Grosbach | 2008-10-03 | 1 | -1/+1 |
| | | | | | | | reg->reg moves. llvm-svn: 57011 | ||||
| * | NeedStub/DoesntNeedStub logic was reversed, leading to not using a stub | Jim Grosbach | 2008-10-03 | 1 | -4/+4 |
| | | | | | | | for global relocations that do need them (libc calls, for example). llvm-svn: 57010 | ||||
| * | Switch the MachineOperand accessors back to the short names like | Dan Gohman | 2008-10-03 | 1 | -10/+10 |
| | | | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006 | ||||
| * | Fix typo s/ther/there/ | Jim Grosbach | 2008-10-01 | 1 | -1/+1 |
| | | | | | llvm-svn: 56924 | ||||
| * | Duh. Default to ARMCC::AL (always). | Evan Cheng | 2008-09-18 | 1 | -23/+63 |
| | | | | | llvm-svn: 56301 | ||||
| * | Fix addrmode1 instruction encodings; fix bx_ret encoding. | Evan Cheng | 2008-09-17 | 1 | -2/+2 |
| | | | | | llvm-svn: 56277 | ||||
| * | Fix random abort. | Evan Cheng | 2008-09-13 | 1 | -2/+4 |
| | | | | | llvm-svn: 56184 | ||||
| * | Typo. | Evan Cheng | 2008-09-13 | 1 | -3/+3 |
| | | | | | llvm-svn: 56182 | ||||
| * | Rely on instruction format to determine so_reg operand for now. | Evan Cheng | 2008-09-13 | 1 | -1/+5 |
| | | | | | llvm-svn: 56181 | ||||
| * | Revert 56176. All those instruction formats are still needed. | Evan Cheng | 2008-09-13 | 1 | -2/+10 |
| | | | | | llvm-svn: 56180 | ||||
| * | Accidentially flipped the condition. | Evan Cheng | 2008-09-13 | 1 | -1/+1 |
| | | | | | llvm-svn: 56179 | ||||
| * | Add debug dumps. | Evan Cheng | 2008-09-13 | 1 | -0/+5 |
| | | | | | llvm-svn: 56178 | ||||
| * | Eliminate unnecessary instruction formats. | Evan Cheng | 2008-09-12 | 1 | -16/+4 |
| | | | | | llvm-svn: 56176 | ||||
| * | Addrmode 1 S bit can be dynamically set. Look for CPSR def. | Evan Cheng | 2008-09-12 | 1 | -26/+42 |
| | | | | | llvm-svn: 56172 | ||||
| * | Rewrite address mode 1 code emission routines. | Evan Cheng | 2008-09-12 | 1 | -129/+103 |
| | | | | | llvm-svn: 56171 | ||||
| * | Tidy up several unbeseeming casts from pointer to intptr_t. | Dan Gohman | 2008-09-04 | 1 | -2/+2 |
| | | | | | llvm-svn: 55779 | ||||
| * | Revamp ARM JIT. | Evan Cheng | 2008-09-02 | 1 | -490/+375 |
| | | | | | llvm-svn: 55624 | ||||
| * | Remove bunch of gcc 4.3-related warnings from Target | Anton Korobeynikov | 2008-02-20 | 1 | -2/+3 |
| | | | | | llvm-svn: 47369 | ||||
| * | Rename MRegisterInfo to TargetRegisterInfo. | Dan Gohman | 2008-02-10 | 1 | -4/+5 |
| | | | | | llvm-svn: 46930 | ||||
| * | rename TargetInstrDescriptor -> TargetInstrDesc. | Chris Lattner | 2008-01-07 | 1 | -15/+14 |
| | | | | | | | | Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. llvm-svn: 45695 | ||||
| * | Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects | Chris Lattner | 2008-01-07 | 1 | -2/+2 |
| | | | | | | | | | | | | | | | | that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. llvm-svn: 45674 | ||||
| * | Add new shorter predicates for testing machine operands for various types: | Chris Lattner | 2007-12-30 | 1 | -3/+3 |
| | | | | | | | | | | | | | e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464 | ||||
| * | Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵ | Chris Lattner | 2007-12-30 | 1 | -5/+5 |
| | | | | | | | Likewise setImmedValue -> setImm llvm-svn: 45453 | ||||
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| | | | | | llvm-svn: 45418 | ||||
| * | Comments added. It now generates V5TE multiply instructions. However, it is ↵ | Raul Herbster | 2007-08-30 | 1 | -58/+175 |
| | | | | | | | still necessary to model PUWLSH bits more clearly. llvm-svn: 41627 | ||||
| * | Initial JIT support for ARM by Raul Fernandes Herbster. | Evan Cheng | 2007-08-07 | 1 | -0/+444 |
| | | | | | llvm-svn: 40887 | ||||
| * | no email addrs in file headers | Chris Lattner | 2007-07-17 | 1 | -3/+2 |
| | | | | | llvm-svn: 39962 | ||||
| * | Initial ARM JIT support by Raul Fernandes Herbster. | Evan Cheng | 2007-07-05 | 1 | -0/+93 |
| llvm-svn: 37926 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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