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path: root/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
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* [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.Eli Friedman2019-06-261-14/+20
* CodeGen: Introduce a class for registersMatt Arsenault2019-06-241-2/+2
* [ARM] Add the non-MVE instructions in Arm v8.1-M.Simon Tatham2019-06-111-0/+2
* Revert rL362953 and its followup rL362955.Simon Tatham2019-06-101-2/+0
* [ARM] Add the non-MVE instructions in Arm v8.1-M.Simon Tatham2019-06-101-0/+2
* [ARM] Replace fp-only-sp and d16 with fp64 and d32.Simon Tatham2019-05-281-2/+2
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [CodeGen] emit inline asm clobber list warnings for reserved (cont)Ties Stuij2018-08-301-0/+5
* Remove trailing spaceFangrui Song2018-07-301-1/+1
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-4/+4
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-9/+9
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* [RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.Jonas Paulsson2017-11-101-3/+4
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* [ARM] Dynamic stack alignment for 16-bit ThumbMomchil Velikov2017-10-221-5/+1
* [SystemZ] implement shouldCoalesce()Jonas Paulsson2017-09-291-1/+2
* ARM: One more fix for swifterror CSR setArnold Schwaighofer2017-09-251-3/+7
* [ARM] Fix -Wdangling-else warning.Benjamin Kramer2017-09-251-8/+4
* ARM: Use the proper swifterror CSR list on platforms other than darwinArnold Schwaighofer2017-09-251-2/+8
* [ARM] Use Swift error registers on non-Darwin targetsBrian Gesiak2017-08-301-2/+2
* fix typos in comments; NFCHiroshi Inoue2017-07-161-2/+2
* [ARM] Tidy up ARMBaseRegisterInfo implementation. NFCJaved Absar2017-07-101-11/+8
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-2/+2
* ARM: Compute MaxCallFrame size earlyMatthias Braun2017-05-051-4/+11
* Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-1/+2
* [ARM] Fix some Clang-tidy modernize and Include What You Use warnings; other ...Eugene Zelenko2017-01-311-13/+19
* [ARM] Use helpers for adding pred / CC operands. NFCDiana Picus2017-01-201-4/+5
* [ARM] CodeGen: Remove AddDefaultCC. NFC.Diana Picus2017-01-131-1/+1
* [ARM] CodeGen: Remove AddDefaultPred. NFC.Diana Picus2017-01-131-1/+1
* Clarify rules for reserved regs, fix aarch64 ones.Matthias Braun2016-11-301-9/+11
* [ARM] Fix registers clobbered by SjLj EH on soft-float targetsOliver Stannard2016-10-111-0/+9
* [ARM] Generate consistent frame records for Thumb2Oliver Stannard2016-08-231-7/+2
* Use the range variant of find instead of unpacking begin/endDavid Majnemer2016-08-111-2/+1
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-11/+11
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-7/+4
* ARM: use callee-saved list in the order they're actually saved.Tim Northover2016-05-131-2/+5
* ARM: use r7 as the frame-pointer on all MachO targets.Tim Northover2016-04-111-6/+3
* Swift Calling Convention: swifterror target support.Manman Ren2016-04-111-0/+9
* [ARM] Use the efficient version of BitVector::set and a static_assert.Benjamin Kramer2016-01-141-3/+2
* CXX_FAST_TLS calling convention: performance improvement for ARM.Manman Ren2016-01-121-1/+12
* CXX_FAST_TLS calling convention: Add support for ARM on Darwin.Manman Ren2016-01-111-0/+4
* ARM: support TLS accesses on Darwin platformsTim Northover2016-01-071-0/+8
* Targets: commonize some stack realignment codeJF Bastien2015-07-201-13/+1
* TargetRegisterInfo: Provide a way to check assigned registers in getRegAlloca...Matthias Braun2015-07-151-1/+2
* Target RegisterInfo: devirtualize TargetFrameLoweringJF Bastien2015-07-101-10/+10
* ARM: Handle physreg targets in RegPair hints gracefullyMatthias Braun2015-04-031-6/+15
* [ARM] Fix handling of thumb1 out-of-range frame offsetsJohn Brawn2015-03-201-5/+4
* [ARM] Fix offset calculation in ARMBaseRegisterInfo::needsFrameBaseRegRichard Barton2015-03-171-1/+0
* Remove the need to cache the subtarget in the ARM TargetRegisterInfoEric Christopher2015-03-121-12/+20
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-4/+6
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