| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 114445
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instructions (PICADD, PICLDR, et.al.)
llvm-svn: 114243
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llvm-svn: 114237
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and shift instructions on ARM. Update the tests to match.
llvm-svn: 114230
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llvm-svn: 114215
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instruction lowering.
llvm-svn: 114191
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llvm-svn: 114183
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(PICLDRB, et. al.) and PICSTR*
llvm-svn: 114098
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used for anything.
llvm-svn: 114067
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functions in ARMBaseInfo.h so it can be used in the MC library as well.
For anything bigger than this, we may want a means to have a small support
library for shared helper functions like this. Cross that bridge when we
come to it.
llvm-svn: 114016
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llvm-svn: 113860
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llvm-svn: 113856
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llvm-svn: 112790
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all the other LDM/STM instructions. This fixes asm printer crashes when
compiling with -O0. I've changed one of the NEON tests (vst3.ll) to run
with -O0 to check this in the future.
Prior to this change VLDM/VSTM used addressing mode #5, but not really.
The offset field was used to hold a count of the number of registers being
loaded or stored, and the AM5 opcode field was expanded to specify the IA
or DB mode, instead of the standard ADD/SUB specifier. Much of the backend
was not aware of these special cases. The crashes occured when rewriting
a frameindex caused the AM5 offset field to be changed so that it did not
have a valid submode. I don't know exactly what changed to expose this now.
Maybe we've never done much with -O0 and NEON. Regardless, there's no longer
any reason to keep a count of the VLDM/VSTM registers, so we can use
addressing mode #4 and clean things up in a lot of places.
llvm-svn: 112322
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instructions besides saturate instructions. No functional changes.
llvm-svn: 111168
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the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.
llvm-svn: 110951
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instruction opcode. This also fixes part of PR7792.
llvm-svn: 110875
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llvm-svn: 110292
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llvm-svn: 110267
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the jtblock_operand print methods. This avoids extra newlines in the
disassembler's output. PR7757.
llvm-svn: 109948
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beginning on ARM Darwin assembly files so that it won't be placed after
debug sections. Radar 8252813.
llvm-svn: 109879
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rdar://8202967
llvm-svn: 109057
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out of the AsmPrinter directory into libarm. Now the
ARM InstPrinters depend jsut on the MC stuff, not on vmcore
or codegen.
llvm-svn: 108783
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llvm-svn: 54889
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llvm-svn: 54540
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llvm-svn: 54534
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PIC relative constantpool.
llvm-svn: 54519
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llvm-svn: 54458
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llvm-svn: 53360
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llvm-svn: 53280
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This is a question of the debugging setup code not
being called at the right time, and it's called from
target-dependent code for some reason. I have only
attempted to fix Darwin, but I'm pretty sure it's
broken elsewhere; I'll leave that to people who can
test it.
llvm-svn: 53254
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llvm-svn: 53196
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$non_lazy_ptr's and $lazy_ptr's.
llvm-svn: 51277
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16-byte boundaries.
llvm-svn: 47703
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would have been a Godsend here!
llvm-svn: 47625
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really really really need refactoring :(
llvm-svn: 47171
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Spotted by Nick Kledzik.
llvm-svn: 47037
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llvm-svn: 46930
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llvm-svn: 46667
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the function label isn't associated with something it shouldn't be.
llvm-svn: 46449
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llvm-svn: 46267
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as weak globals rather than commons. While not wrong,
this change tickled a latent bug in Darwin's strip,
so revert it for now as a workaround.
llvm-svn: 46147
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llvm-svn: 45849
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
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Likewise setImmedValue -> setImm
llvm-svn: 45453
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llvm-svn: 45418
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Then:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx
.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
Now:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax
.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
llvm-svn: 43924
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static __thread struct {
int a;
int b;
} teste = {0, 0};
llvm-svn: 43722
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should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
llvm-svn: 43688
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llvm-svn: 42960
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