summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/A15SDOptimizer.cpp
Commit message (Expand)AuthorAgeFilesLines
* [ARM] Add new feature to enable optimizing the VFP registersEvandro Menezes2018-07-201-1/+2
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-10/+9
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* [CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih2017-11-281-2/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
* [ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementationJaved Absar2017-08-141-27/+12
* [ARM] CodeGen: Remove AddDefaultPred. NFC.Diana Picus2017-01-131-14/+10
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-3/+1
* ARM: Remove implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-081-1/+1
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-40/+29
* Add optimization bisect opt-in calls for ARM passesAndrew Kaylor2016-04-251-0/+3
* Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.Benjamin Kramer2015-03-231-0/+1
* Cleanup and remove a chunk of getARMSubtarget calls in theEric Christopher2015-03-051-2/+9
* Include map into the A15SDOptimizer rather than pick it upEric Christopher2014-10-141-0/+1
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-3/+2
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-2/+4
* Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the...Craig Topper2014-06-191-2/+1
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-3/+3
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* Tidy up. Trailing whitespace.Jim Grosbach2014-04-031-4/+4
* Prune includes in ARM target.Craig Topper2014-03-221-6/+1
* [ARM]Fix an assertion failure in A15SDOptimizer about DPair reg class by trea...Hao Liu2014-03-201-3/+9
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-131-4/+4
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-101-2/+2
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-3/+1
* Correct word hyphenationsAlp Toker2013-12-051-1/+1
* ARM: Teach A15 SDOptimizer to properly handle D-reg by-lane.Jim Grosbach2013-09-041-0/+7
* Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ...Craig Topper2013-07-031-3/+3
* Adding an A15 specific optimization pass for interactions between S/D/Q regis...Silviu Baranga2013-03-151-0/+704
OpenPOWER on IntegriCloud