| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | AMDGPU: Rework how private buffer passed for HSA | Matt Arsenault | 2015-11-30 | 1 | -2/+111 |
| | | | | | | | | | | | | | | | | | If we know we have stack objects, we reserve the registers that the private buffer resource and wave offset are passed and use them directly. If not, reserve the last 5 SGPRs just in case we need to spill. After register allocation, try to pick the next available registers instead of the last SGPRs, and then insert copies from the inputs to the reserved registers in the progloue. This also only selectively enables all of the input registers which are really required instead of always enabling them. llvm-svn: 254331 | ||||
| * | AMDGPU: Check feature attributes in SIMachineFunctionInfo | Matt Arsenault | 2015-11-25 | 1 | -6/+98 |
| | | | | | llvm-svn: 254091 | ||||
| * | AMDGPU: Also track whether SGPRs were spilled | Matt Arsenault | 2015-11-05 | 1 | -2/+17 |
| | | | | | llvm-svn: 252145 | ||||
| * | R600 -> AMDGPU rename | Tom Stellard | 2015-06-13 | 1 | -0/+66 |
| | | | | | llvm-svn: 239657 | ||||
| * | Revert "AMDGPU: Add core backend files for R600/SI codegen v6" | Tom Stellard | 2012-07-16 | 1 | -37/+0 |
| | | | | | | | This reverts commit 4ea70107c5e51230e9e60f0bf58a0f74aa4885ea. llvm-svn: 160303 | ||||
| * | AMDGPU: Add core backend files for R600/SI codegen v6 | Tom Stellard | 2012-07-16 | 1 | -0/+37 |
| llvm-svn: 160270 | |||||

