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path: root/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
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* AMDGPU: Refactor treatment of denormal modeMatt Arsenault2019-11-191-7/+0
* AMDGPU: Add default denormal mode to MachineFunctionInfoMatt Arsenault2019-11-011-2/+10
* AMDGPU: Add amdgpu-32bit-address-high-bits to MIR serializationMatt Arsenault2019-08-271-1/+4
* [llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-151-3/+3
* [AMDGPU] gfx908 agpr spillingStanislav Mekhanoshin2019-07-111-1/+29
* AMDGPU: Serialize mode from MachineFunctionInfoMatt Arsenault2019-07-101-0/+27
* AMDGPU: Make s34 the FP registerMatt Arsenault2019-07-081-0/+8
* [AMDGPU] Enable serializing of argument info.Michael Liao2019-07-031-0/+121
* AMDGPU: Support GDS atomicsNicolai Haehnle2019-07-011-0/+5
* AMDGPU: Convert some places to RegisterMatt Arsenault2019-07-011-2/+2
* [AMDGPU] Removed dead SIMachineFunctionInfo::getWorkItemIDVGPR()Stanislav Mekhanoshin2019-06-251-3/+0
* Reapply "AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics"Matt Arsenault2019-06-191-1/+36
* Revert rL363678 : AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsicsSimon Pilgrim2019-06-191-36/+1
* AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsicsMatt Arsenault2019-06-181-1/+36
* AMDGPU: Cleanup custom PseudoSourceValue definitionsMatt Arsenault2019-06-171-16/+23
* AMDGPU: Invert frame index offset interpretationMatt Arsenault2019-06-051-3/+7
* [AMDGPU] Pre-allocate WWM registers to reduce VGPR pressure.Neil Henning2019-04-011-0/+5
* AMDGPU: Remove dx10-clamp from subtarget featuresMatt Arsenault2019-03-291-0/+7
* MIR: Allow targets to serialize MachineFunctionInfoMatt Arsenault2019-03-141-1/+53
* AMDGPU: Remove debugger related subtarget featuresMatt Arsenault2019-02-211-30/+0
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* AMDGPU/AMDHSA: Remove GridWorkGroupCountX/Y/ZKonstantin Zhuravlyov2018-06-211-15/+0
* [AMDGPU] Track occupancy in MFIStanislav Mekhanoshin2018-05-311-0/+26
* AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headersTom Stellard2018-05-221-28/+12
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-3/+3
* AMDGPU: Support realigning stackMatt Arsenault2018-03-291-0/+9
* [AMDGPU] stop buffer_store being moved illegallyTim Renouf2018-02-201-6/+2
* Reapply "AMDGPU: Add 32-bit constant address space"Matt Arsenault2018-02-091-0/+6
* Revert "AMDGPU: Add 32-bit constant address space"Rafael Espindola2018-02-071-6/+0
* AMDGPU: Add 32-bit constant address spaceMarek Olsak2018-02-071-0/+6
* [AMDGPU] stop image_store being moved illegallyTim Renouf2018-01-121-6/+2
* AMDGPU: Use unique PSVs for buffer resourcesMatt Arsenault2017-12-291-6/+9
* AMDGPU: Implement getTgtMemIntrinsic for imagesMatt Arsenault2017-12-291-4/+15
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-2/+2
* AMDGPU: Fix warning discovered by r317266 [-Wunused-private-field]Konstantin Zhuravlyov2017-11-021-1/+0
* AMDGPU: Remove outdated fixme (it was already fixed)Konstantin Zhuravlyov2017-11-021-3/+0
* [AMDGPU] AMDPAL scratch buffer supportTim Renouf2017-09-291-0/+9
* Add AddresSpace to PseudoSourceValue.Jan Sjodin2017-09-141-4/+5
* AMDGPU: Start adding tail call supportMatt Arsenault2017-08-111-0/+19
* [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use war...Eugene Zelenko2017-08-081-35/+40
* AMDGPU: Pass special input registers to functionsMatt Arsenault2017-08-031-45/+51
* AMDGPU: Fix clobbering CSR VGPRs when spilling SGPR to itMatt Arsenault2017-08-021-1/+18
* AMDGPU: Annotate implicitarg.ptr usageMatt Arsenault2017-07-281-0/+8
* AMDGPU: Figure out private memory regs after loweringMatt Arsenault2017-07-181-1/+4
* AMDGPU: Annotate features from x work item/group IDs.Matt Arsenault2017-07-171-0/+5
* AMDGPU: Partially fix implicit.buffer.ptr intrinsic handlingMatt Arsenault2017-06-261-7/+7
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* AMDGPU: Start defining a calling conventionMatt Arsenault2017-05-171-3/+2
* AMDGPU: Add StackPtr and FramePtr registers to MFIMatt Arsenault2017-04-241-0/+24
* AMDGPU: Make MFI fields privateMatt Arsenault2017-04-181-3/+5
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