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path: root/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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* [AMDGPU] Prevent VGPR copies from moving across the EXEC mask definitionsAlexander Timofeev2019-08-211-0/+9
* Revert "AMDGPU: Fix iterator error when lowering SI_END_CF"Matt Arsenault2019-08-201-7/+0
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-117/+117
* Re-commit: [AMDGPU] Use S_DENORM_MODE for gfx10Austin Kerbow2019-08-061-0/+1
* Revert "[AMDGPU] Use S_DENORM_MODE for gfx10"Dmitri Gribenko2019-08-051-1/+0
* [AMDGPU] Use S_DENORM_MODE for gfx10Austin Kerbow2019-08-051-0/+1
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-011-32/+29
* Reapply "AMDGPU: Split block for si_end_cf"Matt Arsenault2019-08-011-0/+7
* [AMDGPU] Fix typo in error messageJay Foad2019-07-291-1/+1
* [AMDGPU] Add llvm.amdgcn.softwqm intrinsicCarl Ritson2019-07-261-0/+3
* AMDGPU: Force s_waitcnt after GWS instructionsMatt Arsenault2019-07-191-1/+1
* AMDGPU/GlobalISel: Select flat loadsMatt Arsenault2019-07-161-0/+19
* [AMDGPU] Fix DPP combiner check for exec modificationJay Foad2019-07-121-21/+49
* Delete dead storesFangrui Song2019-07-121-8/+5
* [AMDGPU] gfx908 agpr spillingStanislav Mekhanoshin2019-07-111-19/+70
* [AMDGPU] gfx908 mfma supportStanislav Mekhanoshin2019-07-111-32/+170
* AMDGPU: Make s34 the FP registerMatt Arsenault2019-07-081-3/+4
* AMDGPU/GFX10: fix scratch resource descriptorNicolai Haehnle2019-07-011-2/+2
* AMDGPU: Write LDS objects out as global symbols in code generationNicolai Haehnle2019-06-251-4/+4
* AMDGPU: Don't clobber VCC in MUBUF addr64 emulationMatt Arsenault2019-06-201-9/+16
* AMDGPU: Consolidate some getGeneration checksMatt Arsenault2019-06-191-6/+6
* AMDGPU: Fix folding immediate into readfirstlane through reg_sequenceMatt Arsenault2019-06-191-1/+0
* Reapply "AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics"Matt Arsenault2019-06-191-1/+2
* Revert rL363678 : AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsicsSimon Pilgrim2019-06-191-2/+1
* AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsicsMatt Arsenault2019-06-181-1/+2
* AMDGPU: Change API for checking for exec modificationMatt Arsenault2019-06-181-17/+38
* Describe stack-id as an enumSander de Smalen2019-06-171-2/+2
* AMDGPU: Prepare for explicit absolute relocations in code generationNicolai Haehnle2019-06-161-1/+3
* AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0Nicolai Haehnle2019-06-161-4/+1
* [AMDGPU] gfx10 conditional registers handlingStanislav Mekhanoshin2019-06-161-57/+159
* AMDGPU: Fix missing constMatt Arsenault2019-06-141-1/+1
* [AMDGPU] gfx1010 dpp16 and dpp8Stanislav Mekhanoshin2019-06-121-1/+20
* [AMDGPU] gfx1010 premlane instructionsStanislav Mekhanoshin2019-06-121-0/+20
* AMDGPU: Force skips around trapsMatt Arsenault2019-06-071-1/+1
* AMDGPU: Insert skip branches over return blocksMatt Arsenault2019-06-061-0/+4
* [AMDGPU] Partial revert for the ba447bae7448435c9986eece0811da1423972fddAlexander Timofeev2019-06-061-6/+3
* AMDGPU: Invert frame index offset interpretationMatt Arsenault2019-06-051-7/+7
* AMDGPU: Fix using 2 different enums for same operand flagsMatt Arsenault2019-06-051-2/+2
* [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operandsDmitry Preobrazhensky2019-06-031-11/+11
* [AMDGPU] Divergence driven ISel. Assign register class for cross block va...Alexander Timofeev2019-05-261-3/+10
* Revert r361644, "[AMDGPU] Divergence driven ISel. Assign register class for c...Peter Collingbourne2019-05-251-10/+3
* [AMDGPU] Divergence driven ISel. Assign register class for cross block values...Alexander Timofeev2019-05-241-3/+10
* MC: Allow getMaxInstLength to depend on the subtargetMatt Arsenault2019-05-221-1/+2
* AMDGPU: Assume calls read execMatt Arsenault2019-05-211-0/+4
* AMDGPU: Force skip branches over callsMatt Arsenault2019-05-201-1/+1
* [AMDGPU] Fixed handling of imemdiate i1 literalsStanislav Mekhanoshin2019-05-141-0/+3
* AMDGPU: Verify that SOP2/SOPC instructions have at most one immediate operandNicolai Haehnle2019-05-071-0/+18
* [AMDGPU] gfx1010 verifier changesStanislav Mekhanoshin2019-05-061-7/+15
* [AMDGPU] gfx1010: prefer V_MUL_LO_U32 over V_MUL_LO_I32Stanislav Mekhanoshin2019-05-061-1/+1
* [AMDGPU] gfx1010: use fmac instructionsStanislav Mekhanoshin2019-05-041-31/+75
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