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path: root/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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* [AMDGPU] Fix getInstrLatency() always returning 1Stanislav Mekhanoshin2020-01-141-3/+5
* [AMDGPU] Fix bundle schedulingStanislav Mekhanoshin2020-01-091-0/+17
* TII: Fix using Register for a subregister index argumentMatt Arsenault2019-12-271-1/+1
* AMDGPU: Use correct DebugLocMatt Arsenault2019-12-271-1/+1
* Make more use of MachineInstr::mayLoadOrStore.Jay Foad2019-12-191-2/+2
* [AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtrJay Foad2019-12-171-1/+1
* Fix assertion failure in getMemOperandWithOffsetWidthKristof Beyls2019-12-171-12/+17
* AMDGPU: Reuse carry out register during FI eliminationAustin Kerbow2019-11-281-1/+5
* [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegenDmitry Preobrazhensky2019-11-201-0/+23
* AMDGPU: Change boolean content type to 0 or 1Matt Arsenault2019-11-151-5/+5
* Use MCRegister in copyPhysRegMatt Arsenault2019-11-111-4/+4
* AMDGPU: Disallow spill folding with m0 copiesMatt Arsenault2019-10-301-0/+35
* [AMDGPU] Enable SGPR copy foldingStanislav Mekhanoshin2019-10-251-13/+11
* AMDGPU: Fix the broken dominator tree when creating waterfall loop for resour...Changpeng Fang2019-10-251-2/+2
* AMDGPU: Stop adding m0 implicit def to SGPR spillsMatt Arsenault2019-10-211-13/+2
* [AMDGPU] Select AGPR in PHI operand legalizationStanislav Mekhanoshin2019-10-211-0/+4
* AMDGPU: Split flat offsets that don't fit in DAGMatt Arsenault2019-10-201-0/+14
* AMDGPU: Relax 32-bit SGPR register classMatt Arsenault2019-10-181-4/+4
* [AMDGPU] Fix-up cases where writelane has 2 SGPR operandsDavid Stuttard2019-10-161-0/+26
* AMDGPU: Fix infinite searches in SIFixSGPRCopiesAustin Kerbow2019-10-151-0/+2
* [AMDGPU] Support mov dpp with 64 bit operandsStanislav Mekhanoshin2019-10-151-0/+62
* [AMDGPU] Come back patch for the 'Assign register class for cross block value...Alexander Timofeev2019-10-141-4/+8
* AMDGPU: Use SGPR_128 instead of SReg_128 for vregsMatt Arsenault2019-10-101-3/+3
* GlobalISel: Add target pre-isel instructionsMatt Arsenault2019-10-071-1/+2
* [AMDGPU] Fix illegal agpr use by VALUStanislav Mekhanoshin2019-10-021-1/+10
* [AMDGPU] Extend buffer intrinsics with swizzlingPiotr Sobczak2019-10-021-0/+2
* Remove the AliasAnalysis argument in function areMemAccessesTriviallyDisjointChangpeng Fang2019-09-261-2/+1
* [TargetInstrInfo] Let findCommutedOpIndices take const MachineInstr&Simon Pilgrim2019-09-251-1/+2
* [AMDGPU]: PHI Elimination hooks added for custom COPY insertion. FixedAlexander Timofeev2019-09-171-0/+37
* Revert for: [AMDGPU]: PHI Elimination hooks added for custom COPY insertion.Alexander Timofeev2019-09-131-30/+0
* AMDGPU: Inline constant when materalizing FI with add on gfx9Matt Arsenault2019-09-121-1/+1
* [AMDGPU] Fix crash in phi-elimination hook.Michael Liao2019-09-111-2/+4
* [AMDGPU]: PHI Elimination hooks added for custom COPY insertion.Alexander Timofeev2019-09-101-0/+28
* AMDGPU: Allow getMemOperandWithOffset to analyze stack accessesMatt Arsenault2019-09-051-2/+19
* AMDGPU: Handle frame index expansion with no free SGPRs pre gfx9Matt Arsenault2019-09-041-1/+1
* AMDGPU: Don't use frame virtual registersMatt Arsenault2019-08-291-0/+17
* [AMDGPU] w/a for gfx908 mfma SrcC literal HW bugStanislav Mekhanoshin2019-08-231-3/+9
* [AMDGPU] Prevent VGPR copies from moving across the EXEC mask definitionsAlexander Timofeev2019-08-211-0/+9
* Revert "AMDGPU: Fix iterator error when lowering SI_END_CF"Matt Arsenault2019-08-201-7/+0
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-117/+117
* Re-commit: [AMDGPU] Use S_DENORM_MODE for gfx10Austin Kerbow2019-08-061-0/+1
* Revert "[AMDGPU] Use S_DENORM_MODE for gfx10"Dmitri Gribenko2019-08-051-1/+0
* [AMDGPU] Use S_DENORM_MODE for gfx10Austin Kerbow2019-08-051-0/+1
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-011-32/+29
* Reapply "AMDGPU: Split block for si_end_cf"Matt Arsenault2019-08-011-0/+7
* [AMDGPU] Fix typo in error messageJay Foad2019-07-291-1/+1
* [AMDGPU] Add llvm.amdgcn.softwqm intrinsicCarl Ritson2019-07-261-0/+3
* AMDGPU: Force s_waitcnt after GWS instructionsMatt Arsenault2019-07-191-1/+1
* AMDGPU/GlobalISel: Select flat loadsMatt Arsenault2019-07-161-0/+19
* [AMDGPU] Fix DPP combiner check for exec modificationJay Foad2019-07-121-21/+49
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