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path: root/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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* AMDGPU: Refactor Subtarget classesTom Stellard2018-07-111-2/+2
* AMDGPU: Separate R600 and GCN TableGen filesTom Stellard2018-06-281-2/+2
* AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headersTom Stellard2018-05-221-0/+1
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-7/+9
* AMDGPU: Add Vega12 and Vega20Matt Arsenault2018-04-301-5/+13
* [AMDGPU] Truncate packed inline constantStanislav Mekhanoshin2018-04-241-1/+1
* [AMDGPU] Use packed literals with zero either lower or hi partStanislav Mekhanoshin2018-04-191-2/+12
* [AMDGPU] Enabled v2.16 literals for VOP3PStanislav Mekhanoshin2018-04-171-0/+19
* AMDGPU: Fix crash when constant folding with physreg operandMatt Arsenault2018-03-101-1/+2
* AMDGPU: Don't crash when trying to fold implicit operandsMatt Arsenault2018-02-081-0/+1
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun2017-12-131-1/+1
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-2/+2
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-4/+4
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-2/+2
* Remove unused variablesVitaly Buka2017-10-151-1/+1
* AMDGPU: Add comment about clampsMatt Arsenault2017-10-051-0/+2
* AMDGPU: Do not fold clamp instructions when sources are differentMatt Arsenault2017-10-051-0/+1
* AMDGPU: Start selecting v_mad_mixhi_f16Matt Arsenault2017-09-201-0/+1
* AMDGPU: Fold clamp modifier for packed instructionsMatt Arsenault2017-08-311-5/+18
* AMDGPU: Fix crash when folding immediates into multiple usesNicolai Haehnle2017-07-181-0/+1
* [AMDGPU] Fix -Wimplicit-fallthrough warnings. NFCI.Simon Pilgrim2017-07-071-0/+1
* AMDGPU: Do operand folding in program orderMatt Arsenault2017-06-201-5/+3
* AMDGPU: Preserve undef when folding register operandsMatt Arsenault2017-06-201-0/+2
* AMDGPU: Fix crash with undef vreg input operandMatt Arsenault2017-06-201-1/+1
* [AMDGPU] Fix SIFoldOperands crash with clampStanislav Mekhanoshin2017-06-051-1/+2
* [AMDGPU] Preserve operand order in SIFoldOperandsStanislav Mekhanoshin2017-06-031-3/+18
* [AMDGPU] Allow SDWA in instructions with immediates and SGPRsStanislav Mekhanoshin2017-05-301-3/+4
* [AMDGPU] SDWA Peephole: improve search for immediates in SDWA patternsSam Kolton2017-03-311-22/+1
* [AMDGPU] Fold V_CNDMASK with identical source operandsStanislav Mekhanoshin2017-03-241-0/+29
* AMDGPU: Support v2i16/v2f16 packed operationsMatt Arsenault2017-02-271-6/+8
* AMDGPU: Fold omod into instructionsMatt Arsenault2017-02-271-5/+139
* AMDGPU: Use clamp with f64Matt Arsenault2017-02-221-1/+2
* AMDGPU: Fold FP clamp as modifier bitMatt Arsenault2017-02-221-4/+72
* AMDGPU: Fix folding immediates into mac src2Matt Arsenault2017-01-111-2/+30
* AMDGPU: Constant fold when immediate is materializedMatt Arsenault2017-01-101-141/+228
* AMDGPU: Fix handling of 16-bit immediatesMatt Arsenault2016-12-101-5/+9
* AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.Tom Stellard2016-12-071-0/+7
* AMDGPU: Refactor immediate folding logicMatt Arsenault2016-11-291-14/+50
* AMDGPU: Cleanup immediate folding codeMatt Arsenault2016-11-231-64/+62
* AMDGPU: Fix debug printingMatt Arsenault2016-11-231-1/+1
* [AMDGPU] Add f16 support (VI+)Konstantin Zhuravlyov2016-11-131-7/+9
* AMDGPU: Don't fold undef uses or copies with implicit usesMatt Arsenault2016-10-061-4/+22
* AMDGPU: Remove leftover implicit operands when folding immediatesMatt Arsenault2016-10-061-7/+26
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-3/+1
* AMDGPU: Support folding FrameIndex operandsMatt Arsenault2016-09-141-9/+26
* AMDGPU: Improve splitting 64-bit bit ops by constantsMatt Arsenault2016-09-141-0/+126
* AMDGPU: Don't fold subregister extracts into tied operandsMatt Arsenault2016-08-151-3/+15
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-4/+4
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-241-4/+3
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