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path: root/llvm/lib/Target/AMDGPU/CMakeLists.txt
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* AMDGPU: Add macro fusion schedule DAG mutationMatt Arsenault2017-07-061-0/+1
* AMDGPU: Remove SITypeRewriterMatt Arsenault2017-06-281-1/+0
* AMDGPU: Work around build special casing .inc filesMatt Arsenault2017-06-081-0/+1
* Re-submit AMDGPUMachineCFGStructurizer.Jan Sjodin2017-05-151-0/+1
* Revert 303091.Jan Sjodin2017-05-151-1/+0
* Add AMDGPUMachineCFGStructurizer.Jan Sjodin2017-05-151-0/+1
* [AMDGPU] Add a new pass to insert waitcnts. Leave under an option for testing.Kannan Narayanan2017-04-121-0/+1
* AMDGPU: Unify divergent function exits.Matt Arsenault2017-03-241-0/+1
* [AMDGPU] Iterative scheduling infrastructure + minimal registry schedulerValery Pykhtin2017-03-211-0/+3
* [ADMGPU] SDWA peephole optimization pass.Sam Kolton2017-03-211-0/+1
* [AMDGPU] Add address space based alias analysis passStanislav Mekhanoshin2017-03-171-0/+1
* AMDGPU: Add pass to expand memcpy/memmove/memsetMatt Arsenault2017-02-091-0/+1
* Re-commit AMDGPU/GlobalISel: Add support for simple shadersTom Stellard2017-01-301-0/+6
* Revert "AMDGPU/GlobalISel: Add support for simple shaders"Tom Stellard2017-01-301-6/+0
* AMDGPU/GlobalISel: Add support for simple shadersTom Stellard2017-01-301-0/+6
* [AMDGPU] Add VGPR copies post regalloc fix passStanislav Mekhanoshin2017-01-241-0/+1
* [AMDGPU] Add amdgpu-unify-metadata passStanislav Mekhanoshin2016-12-081-0/+1
* Reapply "AMDGPU: Support using tablegened MC pseudo expansions"Matt Arsenault2016-10-061-0/+1
* Revert "AMDGPU: Support using tablegened MC pseudo expansions"Matt Arsenault2016-10-061-1/+0
* AMDGPU: Support using tablegened MC pseudo expansionsMatt Arsenault2016-10-061-0/+1
* AMDGPU: Partially fix control flow at -O0Matt Arsenault2016-09-291-0/+1
* AMDGPU/SI: Implement a custom MachineSchedStrategyTom Stellard2016-08-291-0/+1
* AMDGPU: Split SILowerControlFlow into two piecesMatt Arsenault2016-08-221-0/+1
* AMDGPU/R600: Delete/rename intrinsics no longer used by mesaMatt Arsenault2016-07-141-1/+0
* AMDGPU: Add stub custom CodeGenPrepare passMatt Arsenault2016-06-241-0/+1
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-241-0/+1
* [AMDGPU][NFC] Rename SIInsertNops -> SIDebuggerInsertNopsKonstantin Zhuravlyov2016-05-101-1/+1
* AMDGPU/SI: Enable the post-ra schedulerTom Stellard2016-04-301-0/+1
* AMDGPU: Add skeleton GlobalIsel implementationTom Stellard2016-04-141-0/+15
* AMDGPU: Remove SIFixSGPRLiveRanges passNicolai Haehnle2016-04-141-1/+0
* AMDGPU: Add SIWholeQuadMode passNicolai Haehnle2016-03-211-0/+1
* AMDGPU: Insert two S_NOP instructions for every high level source statement.Tom Stellard2016-03-031-0/+1
* [AMDGPU] Disassembler: Added basic disassembler for AMDGPU targetTom Stellard2016-02-181-0/+2
* Refactor backend diagnostics for unsupported featuresOliver Stannard2016-02-021-1/+0
* Revert r259035, it introduces a cyclic library dependencyOliver Stannard2016-01-281-0/+1
* Add backend dignostic printer for unsupported featuresOliver Stannard2016-01-281-1/+0
* Revert r258951 (and r258950), "Refactor backend diagnostics for unsupported f...NAKAMURA Takumi2016-01-281-0/+1
* Refactor backend diagnostics for unsupported featuresOliver Stannard2016-01-271-1/+0
* AMDGPU/SI: Add SI Machine SchedulerNicolai Haehnle2016-01-131-0/+1
* AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instruct...Tom Stellard2015-12-151-0/+1
* AMDGPU/SI: Emit constant arrays in the .text sectionTom Stellard2015-12-101-1/+1
* AMDGPU: Remove SIPrepareScratchRegsMatt Arsenault2015-11-301-1/+0
* AMDGPU: Create emergency stack slots during frame loweringMatt Arsenault2015-11-061-0/+1
* AMDGPU: Add pass to detect used kernel featuresMatt Arsenault2015-11-061-0/+1
* AMDGPU: Split DiagnosticInfoUnsupported into its own fileMatt Arsenault2015-10-211-0/+1
* AMDGPU/SI: Use .hsatext section instead of .text for HSATom Stellard2015-09-251-0/+1
* AMDGPU: Add pass to lower OpenCL image and sampler arguments.Tom Stellard2015-08-071-0/+1
* AMDGPU/SI: Add hsa code object directivesTom Stellard2015-06-261-0/+1
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+64
* Revert "AMDGPU: Add core backend files for R600/SI codegen v6"Tom Stellard2012-07-161-50/+0
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