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* AMDGPU: Make CONST_DATA_PTR available to R600Jan Vesely2016-05-131-0/+5
| | | | | | | | | | | | Rename to AMDGPUconstdata_ptr Reviewers: tstellard Subscribers: arsenm Differential Revision: http://reviews.llvm.org/D19786 llvm-svn: 269474
* AMDGPU: Implement {BUFFER,FLAT}_ATOMIC_CMPSWAP{,_X2}Tom Stellard2016-04-011-0/+5
| | | | | | | | | | | | | | | | | Summary: Implement BUFFER_ATOMIC_CMPSWAP{,_X2} instructions on all GCN targets, and FLAT_ATOMIC_CMPSWAP{,_X2} on CI+. 32-bit instruction variants tested manually on Kabini and Bonaire. Tests and parts of code provided by Jan Veselý. Patch by: Vedran Miletić Reviewers: arsenm, tstellarAMD, nhaehnle Subscribers: jvesely, scchan, kanarayan, arsenm Differential Revision: http://reviews.llvm.org/D17280 llvm-svn: 265170
* AMDGPU: Rename intrinsic to better match instruction nameMatt Arsenault2016-02-131-1/+1
| | | | | | Also fixes missing f32 test. llvm-svn: 260780
* AMDGPU: Match some med3 patternsMatt Arsenault2016-01-281-0/+10
| | | | llvm-svn: 259089
* AMDGPU/SI: Add support for non-void functionsMarek Olsak2016-01-131-1/+1
| | | | | | | | | | | | | | | | | | | Summary: Return values can be stored in SGPRs (i32) and VGPRs (f32). This will be used by functions which expect some bytecode or other binary to be appended at the end. It allows defining in which registers the return values will be stored. v2: don't do this for compute shaders Reviewers: tstellarAMD, arsenm Subscribers: arsenm Differential Revision: http://reviews.llvm.org/D16033 llvm-svn: 257621
* AMDGPU: Pattern match ffbh pattern to instruction.Matt Arsenault2016-01-111-0/+2
| | | | | | | | The hardware instruction's output on 0 is -1 rather than 32. Eliminate a test and select to -1. This removes an extra instruction from the compatability function with HSAIL's firstbit instruction. llvm-svn: 257352
* AMDGPU: Use generic bitreverse intrinsicMatt Arsenault2015-12-141-2/+0
| | | | | | Also fix bug in vector legalization for bitreverse. llvm-svn: 255512
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+245
| | | | llvm-svn: 239657
* Revert "AMDGPU: Add core backend files for R600/SI codegen v6"Tom Stellard2012-07-161-69/+0
| | | | | | This reverts commit 4ea70107c5e51230e9e60f0bf58a0f74aa4885ea. llvm-svn: 160303
* AMDGPU: Add core backend files for R600/SI codegen v6Tom Stellard2012-07-161-0/+69
llvm-svn: 160270
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