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path: root/llvm/lib/Target/AArch64/Disassembler
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* Remove autoconf supportChris Bieneman2016-01-261-16/+0
* Reflect the MC/MCDisassembler split on the include/ level.Benjamin Kramer2016-01-262-2/+2
* [AArch64] Add ARMv8.2-A UAO PSTATE bitOliver Stannard2015-11-261-1/+2
* [MC layer][AArch64] llvm-mc accepts 4-bit immediate values forAlexandros Lamprineas2015-10-051-0/+3
* Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and r...Daniel Sanders2015-09-151-4/+5
* Re-commit r247683: Replace Triple with a new TargetTuple in MCTargetDesc/* an...Daniel Sanders2015-09-151-5/+4
* Revert r247684 - Replace Triple with a new TargetTuple ...Daniel Sanders2015-09-151-4/+5
* Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.Daniel Sanders2015-09-151-5/+4
* Change the last few internal StringRef triples into Triple objects.Daniel Sanders2015-07-061-1/+1
* Fix "the the" in comments.Eric Christopher2015-06-191-1/+1
* [AArch64] Add v8.1a atomic instructionsVladimir Sukharev2015-06-022-1/+41
* MC: Clean up MCExpr naming. NFC.Jim Grosbach2015-05-301-11/+11
* MC: Clean up method names in MCContext.Jim Grosbach2015-05-181-2/+2
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-132-50/+50
* [AArch64] Add v8.1a "Limited Ordering Regions" extensionVladimir Sukharev2015-04-161-0/+8
* [AArch64] Refactor AArch64NamedImmMapper to become dependent on subtarget fea...Vladimir Sukharev2015-04-161-1/+4
* unique_ptrify the RelInfo parameter to TargetRegistry::createMCSymbolizerDavid Blaikie2015-01-181-7/+5
* Pass an ArrayRef to MCDisassembler::getInstruction.Rafael Espindola2014-11-122-6/+3
* Misc style fixes. NFC.Rafael Espindola2014-11-102-14/+13
* [AArch64] Allow access to all system registers with MRS/MSR instructions.Tom Coxon2014-10-011-20/+4
* [AArch64] Remove unnecessary whitespace. (Test commit)Tom Coxon2014-09-301-2/+2
* Fix left shifts of negative integers in AArch64 InstPrinter/DisassemblerAlexey Samsonov2014-09-021-3/+3
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-132-4/+4
* Run sort_includes.py on the AArch64 backend.Benjamin Kramer2014-07-251-2/+2
* Update library dependencies.NAKAMURA Takumi2014-07-241-1/+1
* Finish inverting the MC -> Object dependency.Rafael Espindola2014-07-231-1/+1
* AArch64: remove "arm64_be" support in favour of "aarch64_be".Tim Northover2014-07-231-6/+2
* Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the...Craig Topper2014-06-191-2/+1
* Remove outdated CMake MSVC workaroundAlp Toker2014-06-081-7/+1
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-247-0/+1911
* AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.Tim Northover2014-05-244-1614/+0
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper2014-04-291-1/+1
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-2/+2
* [MC] Require an MCContext when constructing an MCDisassembler.Lang Hames2014-04-151-8/+7
* Add AArch64 big endian Target (aarch64_be)Christian Pirker2014-02-241-1/+3
* Remove unnecessary include of AArch64GenInstrInfo.inc from AArch64Disassemble...Craig Topper2014-02-031-1/+0
* Fix known typosAlp Toker2014-01-241-1/+1
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-4/+4
* Prune redundant dependencies in LLVMBuild.txt.NAKAMURA Takumi2013-12-111-1/+1
* Whitespaces.NAKAMURA Takumi2013-12-101-1/+0
* [AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.Kevin Qin2013-11-291-0/+36
* [CMake] Let add_public_tablegen_target responsible to provide dependency to C...NAKAMURA Takumi2013-11-281-2/+0
* [CMake] Prune include_directories() in llvm/lib/Target. add_llvm_target() set...NAKAMURA Takumi2013-11-281-2/+0
* AArch64: Fix a bug about disassembling post-index load single element to 4 ve...Hao Liu2013-11-281-4/+4
* Fixed a bug about disassembling AArch64 post-index load/store single element ...Hao Liu2013-11-251-9/+14
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-191-1/+428
* [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalarChad Rosier2013-11-121-0/+10
* Implement AArch64 post-index vector load/store multiple N-element structure c...Hao Liu2013-11-051-0/+108
* [AArch64] Add support for NEON scalar shift immediate instructions.Chad Rosier2013-10-311-0/+52
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-101-0/+72
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