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path: root/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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* [AArch64][v8.5A] Add Memory Tagging instructionsOliver Stannard2018-10-021-4/+36
* [AArch64][v8.5A] Add speculation restriction system registersOliver Stannard2018-09-271-1/+2
* [AArch64][v8.5A] Add PSTATE manipulation instructions XAFlag and AXFlagOliver Stannard2018-09-271-1/+6
* [Target] Untangle disassemblersBenjamin Kramer2018-09-101-1/+2
* [AArch64] Armv8.4-A: LDAPR & STLR with immediate offset instructions (cont'd)Sjoerd Meijer2018-07-131-7/+7
* [AArch64] Armv8.4-A: LDAPR & STLR with immediate offset instructionsSjoerd Meijer2018-07-121-0/+13
* [AArch64] Make function parameter names in declarations match those of defini...Fangrui Song2018-07-031-8/+8
* [AArch64][SVE] Asm: Support for FMUL (indexed)Sander de Smalen2018-07-031-0/+22
* [AArch64][SVE] Asm: Support for INC/DEC (scalar) instructions.Sander de Smalen2018-06-151-0/+9
* [AArch64][SVE] Asm: Support for DUPM (masked immediate) instruction.Sander de Smalen2018-06-011-1/+2
* [AArch64][SVE] Asm: Support for DUP (immediate) instructions.Sander de Smalen2018-05-251-0/+15
* [AArch64][SVE] Asm: Support for contiguous LD1 (scalar+scalar) load instruct...Sander de Smalen2018-04-201-1/+0
* [AArch64][SVE] Added GPR64shifted and GPR64NoXZRshifted register classes.Sander de Smalen2018-04-201-0/+15
* [AArch64][SVE] Asm: Support for structured LD4 (scalar+imm) load instructions.Sander de Smalen2018-04-161-0/+27
* [AArch64][SVE] Asm: Support for structured LD3 (scalar+imm) load instructions.Sander de Smalen2018-04-161-0/+27
* [AArch64][SVE] Asm: Support for structured LD2 (scalar+imm) load instructions.Sander de Smalen2018-04-161-0/+24
* [AArch64][SVE] Asm: Add AND_ZI instructions and aliasesSander de Smalen2018-02-061-0/+20
* Recommit r322073: [AArch64][SVE] Asm: Add predicated ADD/SUB instructionsSander de Smalen2018-01-091-3/+3
* Reverted r322073 because of AddressSanitizer failure onSander de Smalen2018-01-091-3/+3
* [AArch64][SVE] Asm: Add predicated ADD/SUB instructionsSander de Smalen2018-01-091-3/+3
* [AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.Sander de Smalen2018-01-031-0/+13
* [AArch64][SVE] Re-submit patch series for ZIP1/ZIP2Sander de Smalen2017-12-201-0/+20
* Revert "[AArch64][SVE] Asm" changes, they broke libjpeg_turboReid Kleckner2017-12-181-20/+0
* [AArch64][SVE] Asm: Add SVE predicate register definitions and parsing supportSander de Smalen2017-12-181-0/+20
* Reverted r319315 because of unused functions (due to PPR not yet beingSander de Smalen2017-11-291-20/+0
* [AArch64][SVE] Asm: Add SVE predicate register definitions and parsing supportSander de Smalen2017-11-291-0/+20
* [AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing supportFlorian Hahn2017-11-071-0/+24
* [AArch64] Fix for buildbots, unused functionSam Parker2017-08-181-3/+0
* [AArch64] Remove DecodeAuthLoadWritebackSam Parker2017-08-181-21/+0
* [AArch64] Enable ARMv8.3-A pointer authenticationSam Parker2017-08-111-0/+42
* [AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko2017-07-251-107/+109
* Fix some more -Wimplicit-fallthrough warnings. NFCI.Simon Pilgrim2017-07-071-2/+2
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-091-6/+6
* Replace "fallthrough" comments with LLVM_FALLTHROUGHJustin Bogner2016-08-171-6/+6
* Minor code cleanups. NFC.Junmo Park2016-07-151-2/+2
* AArch64: TableGenerate system instruction operands.Tim Northover2016-07-051-6/+5
* [AArch64] Add ARMv8.2-A UAO PSTATE bitOliver Stannard2015-11-261-1/+2
* [MC layer][AArch64] llvm-mc accepts 4-bit immediate values forAlexandros Lamprineas2015-10-051-0/+3
* Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and r...Daniel Sanders2015-09-151-4/+5
* Re-commit r247683: Replace Triple with a new TargetTuple in MCTargetDesc/* an...Daniel Sanders2015-09-151-5/+4
* Revert r247684 - Replace Triple with a new TargetTuple ...Daniel Sanders2015-09-151-4/+5
* Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.Daniel Sanders2015-09-151-5/+4
* Change the last few internal StringRef triples into Triple objects.Daniel Sanders2015-07-061-1/+1
* [AArch64] Add v8.1a atomic instructionsVladimir Sukharev2015-06-021-0/+40
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-131-49/+49
* [AArch64] Add v8.1a "Limited Ordering Regions" extensionVladimir Sukharev2015-04-161-0/+8
* [AArch64] Refactor AArch64NamedImmMapper to become dependent on subtarget fea...Vladimir Sukharev2015-04-161-1/+4
* unique_ptrify the RelInfo parameter to TargetRegistry::createMCSymbolizerDavid Blaikie2015-01-181-7/+5
* Pass an ArrayRef to MCDisassembler::getInstruction.Rafael Espindola2014-11-121-5/+2
* Misc style fixes. NFC.Rafael Espindola2014-11-101-10/+10
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