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path: root/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
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* [AArch64] Set the max interleave factor for Falkor.Chad Rosier2016-11-221-1/+3
* [AArch64] Add support for Qualcomm's Falkor CPU.Chad Rosier2016-11-151-0/+1
* [AArch64] Adjust the cost model for Exynos M1.Evandro Menezes2016-10-251-1/+1
* Set the vectorizer MaxInterleaveFactor for Exynos.Abderrazek Zaafrani2016-10-211-0/+1
* GlobalISel: rename legalizer components to match others.Tim Northover2016-10-141-2/+2
* AArch64Subtarget: Remove unused CPUString fieldMatthias Braun2016-10-031-3/+4
* Add support to optionally limit the size of jump tables.Evandro Menezes2016-09-261-0/+1
* [GlobalISel] Introduce an instruction selector.Ahmed Bougacha2016-07-271-0/+5
* GlobalISel: implement legalization pass, with just one transformation.Tim Northover2016-07-221-0/+5
* Minor code cleanup. NFC.Junmo Park2016-07-061-1/+1
* Target: Remove unused arguments from overrideSchedPolicy, NFCDuncan P. N. Exon Smith2016-07-011-2/+1
* Delete unused includes. NFC.Rafael Espindola2016-06-301-1/+0
* [AArch64] Add Broadcom Vulcan scheduling model.Pankaj Gode2016-06-301-1/+3
* Move shouldAssumeDSOLocal to Target.Rafael Espindola2016-06-271-2/+1
* [Kryo] Enable loop prefetcher.Haicheng Wu2016-06-211-0/+4
* [AArch64] Restore codegen for AArch64 Cortex-A72/A73 after NFCISilviu Baranga2016-06-211-0/+2
* [AARCH64] Add support for Broadcom VulcanPankaj Gode2016-06-201-0/+1
* [AArch64] Add preferred alignments for Exynos M1Evandro Menezes2016-06-101-2/+5
* AArch64: Do not test for CPUs, use SubtargetFeaturesMatthias Braun2016-06-021-6/+29
* Delete AArch64II::MO_CONSTPOOL.Rafael Espindola2016-05-311-7/+2
* AArch64Subtarget: Use default member initializersMatthias Braun2016-05-271-6/+2
* Use shouldAssumeDSOLocal on AArch64.Rafael Espindola2016-05-261-19/+6
* Don't repeat name in comment and git-clang-format.Rafael Espindola2016-05-251-5/+5
* Sort includes.Rafael Espindola2016-05-251-1/+1
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
* [GlobalISel] Move GISelAccessor class into public headersTom Stellard2016-04-141-5/+5
* [AArch64] Teach the subtarget how to get to the RegisterBankInfo.Quentin Colombet2016-04-061-4/+8
* [GlobalISel] Re-apply r260922-260923 with MSVC-friendly code.Quentin Colombet2016-02-161-1/+7
* Reverting r260922-260923; they cause link failures with MSVC.Aaron Ballman2016-02-161-8/+1
* [GlobalISel] Get rid of the ifdefs in TargetLowering.Quentin Colombet2016-02-161-1/+8
* [AArch64] Add subtarget features for ARMv8.2-AOliver Stannard2015-11-261-5/+5
* AArch64: Default AArch64Subtarget::ReserveX18 to true on darwinJustin Bogner2015-11-131-2/+3
* AArch64: add experimental support for address tagging.Tim Northover2015-11-101-0/+18
* AArch64: Disable the latency heuristicMatthias Braun2015-10-221-0/+5
* Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and r...Daniel Sanders2015-09-151-1/+1
* Re-commit r247683: Replace Triple with a new TargetTuple in MCTargetDesc/* an...Daniel Sanders2015-09-151-1/+1
* Revert r247684 - Replace Triple with a new TargetTuple ...Daniel Sanders2015-09-151-1/+1
* Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.Daniel Sanders2015-09-151-1/+1
* [AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0.Ahmed Bougacha2015-09-011-3/+3
* [AArch64] Define subtarget feature strict-align.Akira Hatanaka2015-07-291-2/+2
* [AArch64] Define subtarget feature "reserve-x18", which is used to decideAkira Hatanaka2015-07-251-1/+2
* Remove getDataLayout() from TargetSelectionDAGInfo (had no users)Mehdi Amini2015-07-091-2/+2
* IR: Do not consider available_externally linkage to be linker-weak.Peter Collingbourne2015-07-051-5/+3
* Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MC...Daniel Sanders2015-06-101-5/+3
* [AArch64] Rename v8.1a from "extension" to "architecture"Vladimir Sukharev2015-04-011-1/+2
* [AArch64, ARM] Add v8.1a architecture and generic cpuVladimir Sukharev2015-03-261-1/+1
* Revert "Migrate the AArch64 TargetRegisterInfo to its TargetMachine"Eric Christopher2015-03-181-9/+3
* Migrate the AArch64 TargetRegisterInfo to its TargetMachineEric Christopher2015-03-121-3/+9
* Remove getSubtargetImpl from AArch64ISelLowering and cache theEric Christopher2015-01-291-1/+1
* Move DataLayout back to the TargetMachine from TargetSubtargetInfoEric Christopher2015-01-261-11/+4
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