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path: root/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
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* [MachineOutliner] Keep track of fns that use a redzone in AArch64FunctionInfoJessica Paquette2018-04-031-5/+8
* [MachineOutliner] Simplify call outlining + require valid callee save info fo...Jessica Paquette2018-03-281-31/+18
* [MachineOutliner] AArch64: Don't outline ADRPs with un-outlinable operandsJessica Paquette2018-03-271-11/+7
* [MachineOutliner] AArch64: Emit CFI instructions when outlining callsJessica Paquette2018-03-191-0/+19
* [MachineOutliner] Make KILLs invisibleJessica Paquette2018-03-161-0/+5
* [AArch64] Adjust the cost model for Exynos M3Evandro Menezes2018-03-151-10/+52
* [AArch64] Refactor stand alone methods (NFC)Evandro Menezes2018-02-091-12/+128
* [AArch64] Add new target feature to handle cheap as move for ExynosEvandro Menezes2018-01-301-2/+1
* [AArch64] Add pipeline model for Exynos M3Evandro Menezes2018-01-301-3/+37
* [AArch64] Generate the CASP instruction for 128-bit cmpxchgOliver Stannard2018-01-291-0/+20
* [MachineOutliner] Move hasAddressTaken check to MachineOutliner.cppJessica Paquette2018-01-131-4/+0
* [MachineOutliner] Outline ADRPsJessica Paquette2018-01-101-0/+6
* [MachineOutliner] AArch64: Handle instrs that use SP and will never need fixupsJessica Paquette2018-01-091-11/+88
* [AArch64] Change order of candidate FMLS patternsMatthew Simpson2017-12-271-22/+22
* [MachineOutliner][NFC] Gardening: use std::any_of instead of bool + loopJessica Paquette2017-12-181-10/+3
* [MachineOutliner] Recommit r320229Jessica Paquette2017-12-181-60/+174
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-5/+5
* [CodeGen] Print stack object references as %(fixed-)stack.0 in both MIR and d...Francis Visoiu Mistrih2017-12-151-3/+3
* Reverted r320229. It broke tests on builder llvm-clang-x86_64-expensive-check...Galina Kistanova2017-12-131-118/+4
* [MachineOutliner] Outline callsJessica Paquette2017-12-091-4/+118
* [MachineOutliner] Fix offset overflow checkJessica Paquette2017-12-071-4/+6
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-3/+3
* [AArch64] Add patterns to replace fsub fmul with fma fneg.Florian Hahn2017-12-061-3/+102
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-11/+11
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-6/+6
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
* AArch64: account for possible frame index operand in compares.Tim Northover2017-10-171-0/+6
* [MachineOutliner] Disable outlining from LinkOnceODRs by defaultJessica Paquette2017-10-071-7/+18
* [MachineOutliner] AArch64: Avoid saving + restoring LR if possibleJessica Paquette2017-09-271-35/+138
* [AArch64] Adjust the cost model for Exynos M1 and M2Evandro Menezes2017-09-181-5/+59
* [AArch64] Adjust the cost model for Exynos M1 and M2Evandro Menezes2017-09-181-1/+2
* Allow target to decide when to cluster loads/stores in mischedStanislav Mekhanoshin2017-09-131-0/+5
* [AArch64] Adjust the cost model for Exynos M1 and M2Evandro Menezes2017-08-281-31/+72
* [AArch64] Add FMOVH0: materialize 0 using zero register for f16 valuesSjoerd Meijer2017-08-241-0/+1
* [MachineOutliner] Add RegState::Define to LDRXpost in insertOutlinedCallJessica Paquette2017-08-101-1/+1
* [MachineOutliner] Ensure AArch64 outliner doesn't mess with W30 or LRJessica Paquette2017-08-081-6/+7
* [MachineOutliner] NFC: Change IsTailCall to a call class + frame classJessica Paquette2017-07-291-22/+27
* [MachineOutliner] NFC: Split up getOutliningBenefitJessica Paquette2017-07-281-225/+227
* Remove unused function from AArch64 backend (NFC)Adrian Prantl2017-07-271-12/+0
* [AArch64][Falkor] Avoid HW prefetcher tag collisions (step 1)Geoff Berry2017-07-141-4/+9
* [MIR] Add support for printing and parsing target MMO flagsGeoff Berry2017-07-131-0/+7
* Doxygen formatting. NFCIJoel Jones2017-07-101-0/+9
* [AArch64] Fix -Wimplicit-fallthrough warnings. NFCI.Simon Pilgrim2017-07-071-0/+2
* Doxygen formatting. NFCIJoel Jones2017-07-061-2/+12
* [AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".Chad Rosier2017-06-231-3/+3
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* [AArch64][Falkor] Refine sched details for LSLfast/ASRfast.Geoff Berry2017-05-231-8/+119
* Fix an improperly placed curly bracket. NFC.Chad Rosier2017-05-161-1/+1
* [AArch64][MachineCombine] Fold FNMUL+FSUB -> FNMADD.Chad Rosier2017-05-111-0/+28
* Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-4/+6
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