index
:
bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
llvm
/
lib
/
Target
/
AArch64
/
AArch64InstrInfo.cpp
Commit message (
Expand
)
Author
Age
Files
Lines
*
[MachineOutliner] Keep track of fns that use a redzone in AArch64FunctionInfo
Jessica Paquette
2018-04-03
1
-5
/
+8
*
[MachineOutliner] Simplify call outlining + require valid callee save info fo...
Jessica Paquette
2018-03-28
1
-31
/
+18
*
[MachineOutliner] AArch64: Don't outline ADRPs with un-outlinable operands
Jessica Paquette
2018-03-27
1
-11
/
+7
*
[MachineOutliner] AArch64: Emit CFI instructions when outlining calls
Jessica Paquette
2018-03-19
1
-0
/
+19
*
[MachineOutliner] Make KILLs invisible
Jessica Paquette
2018-03-16
1
-0
/
+5
*
[AArch64] Adjust the cost model for Exynos M3
Evandro Menezes
2018-03-15
1
-10
/
+52
*
[AArch64] Refactor stand alone methods (NFC)
Evandro Menezes
2018-02-09
1
-12
/
+128
*
[AArch64] Add new target feature to handle cheap as move for Exynos
Evandro Menezes
2018-01-30
1
-2
/
+1
*
[AArch64] Add pipeline model for Exynos M3
Evandro Menezes
2018-01-30
1
-3
/
+37
*
[AArch64] Generate the CASP instruction for 128-bit cmpxchg
Oliver Stannard
2018-01-29
1
-0
/
+20
*
[MachineOutliner] Move hasAddressTaken check to MachineOutliner.cpp
Jessica Paquette
2018-01-13
1
-4
/
+0
*
[MachineOutliner] Outline ADRPs
Jessica Paquette
2018-01-10
1
-0
/
+6
*
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
Jessica Paquette
2018-01-09
1
-11
/
+88
*
[AArch64] Change order of candidate FMLS patterns
Matthew Simpson
2017-12-27
1
-22
/
+22
*
[MachineOutliner][NFC] Gardening: use std::any_of instead of bool + loop
Jessica Paquette
2017-12-18
1
-10
/
+3
*
[MachineOutliner] Recommit r320229
Jessica Paquette
2017-12-18
1
-60
/
+174
*
MachineFunction: Return reference from getFunction(); NFC
Matthias Braun
2017-12-15
1
-5
/
+5
*
[CodeGen] Print stack object references as %(fixed-)stack.0 in both MIR and d...
Francis Visoiu Mistrih
2017-12-15
1
-3
/
+3
*
Reverted r320229. It broke tests on builder llvm-clang-x86_64-expensive-check...
Galina Kistanova
2017-12-13
1
-118
/
+4
*
[MachineOutliner] Outline calls
Jessica Paquette
2017-12-09
1
-4
/
+118
*
[MachineOutliner] Fix offset overflow check
Jessica Paquette
2017-12-07
1
-4
/
+6
*
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
Francis Visoiu Mistrih
2017-12-07
1
-3
/
+3
*
[AArch64] Add patterns to replace fsub fmul with fma fneg.
Florian Hahn
2017-12-06
1
-3
/
+102
*
[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
Francis Visoiu Mistrih
2017-11-30
1
-11
/
+11
*
[CodeGen] Print register names in lowercase in both MIR and debug output
Francis Visoiu Mistrih
2017-11-28
1
-6
/
+6
*
Fix a bunch more layering of CodeGen headers that are in Target
David Blaikie
2017-11-17
1
-2
/
+2
*
AArch64: account for possible frame index operand in compares.
Tim Northover
2017-10-17
1
-0
/
+6
*
[MachineOutliner] Disable outlining from LinkOnceODRs by default
Jessica Paquette
2017-10-07
1
-7
/
+18
*
[MachineOutliner] AArch64: Avoid saving + restoring LR if possible
Jessica Paquette
2017-09-27
1
-35
/
+138
*
[AArch64] Adjust the cost model for Exynos M1 and M2
Evandro Menezes
2017-09-18
1
-5
/
+59
*
[AArch64] Adjust the cost model for Exynos M1 and M2
Evandro Menezes
2017-09-18
1
-1
/
+2
*
Allow target to decide when to cluster loads/stores in misched
Stanislav Mekhanoshin
2017-09-13
1
-0
/
+5
*
[AArch64] Adjust the cost model for Exynos M1 and M2
Evandro Menezes
2017-08-28
1
-31
/
+72
*
[AArch64] Add FMOVH0: materialize 0 using zero register for f16 values
Sjoerd Meijer
2017-08-24
1
-0
/
+1
*
[MachineOutliner] Add RegState::Define to LDRXpost in insertOutlinedCall
Jessica Paquette
2017-08-10
1
-1
/
+1
*
[MachineOutliner] Ensure AArch64 outliner doesn't mess with W30 or LR
Jessica Paquette
2017-08-08
1
-6
/
+7
*
[MachineOutliner] NFC: Change IsTailCall to a call class + frame class
Jessica Paquette
2017-07-29
1
-22
/
+27
*
[MachineOutliner] NFC: Split up getOutliningBenefit
Jessica Paquette
2017-07-28
1
-225
/
+227
*
Remove unused function from AArch64 backend (NFC)
Adrian Prantl
2017-07-27
1
-12
/
+0
*
[AArch64][Falkor] Avoid HW prefetcher tag collisions (step 1)
Geoff Berry
2017-07-14
1
-4
/
+9
*
[MIR] Add support for printing and parsing target MMO flags
Geoff Berry
2017-07-13
1
-0
/
+7
*
Doxygen formatting. NFCI
Joel Jones
2017-07-10
1
-0
/
+9
*
[AArch64] Fix -Wimplicit-fallthrough warnings. NFCI.
Simon Pilgrim
2017-07-07
1
-0
/
+2
*
Doxygen formatting. NFCI
Joel Jones
2017-07-06
1
-2
/
+12
*
[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".
Chad Rosier
2017-06-23
1
-3
/
+3
*
Sort the remaining #include lines in include/... and lib/....
Chandler Carruth
2017-06-06
1
-1
/
+1
*
[AArch64][Falkor] Refine sched details for LSLfast/ASRfast.
Geoff Berry
2017-05-23
1
-8
/
+119
*
Fix an improperly placed curly bracket. NFC.
Chad Rosier
2017-05-16
1
-1
/
+1
*
[AArch64][MachineCombine] Fold FNMUL+FSUB -> FNMADD.
Chad Rosier
2017-05-11
1
-0
/
+28
*
Move size and alignment information of regclass to TargetRegisterInfo
Krzysztof Parzyszek
2017-04-24
1
-4
/
+6
[next]