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path: root/llvm/lib/Target/AArch64/AArch64InstrFormats.td
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* [GlobalISel][AArch64] Import + select LDR*roW and STR*roW patternsJessica Paquette2020-01-091-0/+16
* [AArch64][SVE] Add intrinsics for binary narrowing operationsAndrzej Warzynski2019-12-201-0/+24
* [Aarch64][SVE] Add intrinsics for scatter storesAndrzej Warzynski2019-12-161-0/+29
* [AArch64][SVE] Implement integer compare intrinsicsCullen Rhodes2019-12-061-0/+7
* [AArch64][SVE] Add intrinsics for gather loads with 64-bit offsetsSander de Smalen2019-12-031-3/+16
* [AArch64][v8.3a] Don't emit LDRA '[xN]!' alias in disassembly.Simon Tatham2019-11-281-1/+1
* AArch64: support the Apple NEON syntax for v8.2 crypto instructions.Tim Northover2019-11-271-11/+15
* [AArch64][SVE] Implement additional floating-point arithmetic intrinsicsKerry McLaughlin2019-11-141-3/+15
* [AArch64][v8.3a] Add missing imp-defs on RETA*.Ahmed Bougacha2019-11-131-0/+1
* [AArch64][v8.3a] Add LDRA '[xN]!' alias.Ahmed Bougacha2019-11-131-0/+3
* [AArch64] Select saturating Neon instructionsDavid Green2019-10-311-0/+18
* [AArch64][SVE] Implement sdot and udot (lane) intrinsicsKerry McLaughlin2019-10-111-12/+18
* Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Matt Arsenault2019-09-191-2/+2
* Revert r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Hans Wennborg2019-09-191-2/+2
* GlobalISel: Don't materialize immarg arguments to intrinsicsMatt Arsenault2019-09-191-2/+2
* [AArch64][GlobalISel] Select arithmetic extended register patternsJessica Paquette2019-08-291-4/+19
* [AArch64][GlobalISel] Import XRO load/store patterns instead of custom selectionJessica Paquette2019-08-231-0/+16
* [AArch64][GlobalISel] Select logical_imm32 and logical_imm64 patternsJessica Paquette2019-08-201-0/+5
* [AArch64][GlobalISel] Select patterns which use shifted register operandsJessica Paquette2019-08-201-0/+16
* [AArch64][GlobalISel] Support the neg_addsub_shifted_imm32 patternJessica Paquette2019-08-021-0/+8
* [AArch64] Add support for Transactional Memory Extension (TME)Momchil Velikov2019-07-311-6/+48
* AArch64: Unify relocation restrictions between MOVK/MOVN/MOVZ.Peter Collingbourne2019-07-181-52/+16
* Basic codegen for MTE stack tagging.Evgeniy Stepanov2019-07-171-2/+2
* Revert [AArch64] Add support for Transactional Memory Extension (TME)Momchil Velikov2019-07-171-49/+6
* [AArch64] Add support for Transactional Memory Extension (TME)Momchil Velikov2019-07-171-6/+49
* [AArch64] Add support for MTE intrinsicsJaved Absar2019-04-231-1/+4
* [AArch64] Update v8.5a MTE LDG/STG instructionsJaved Absar2019-04-031-12/+12
* [AArch64] Add v8.5-a Memory Tagging STGM/LDGM instructionsDavid Spickett2019-04-011-1/+1
* [AArch64] Add patterns for zext/sext of shift amount.Eli Friedman2019-01-221-0/+8
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [NFC][AArch64] Split out backend featuresDiogo N. Sampaio2018-12-061-8/+9
* Revert rL348121 from llvm/trunk: [NFC][AArch64] Split out backend featuresSimon Pilgrim2018-12-041-9/+8
* [NFC][AArch64] Split out backend featuresDiogo N. Sampaio2018-12-031-8/+9
* [AArch64] Add support for UDF instructionDiogo N. Sampaio2018-10-301-10/+27
* [AArch64] Rename FP16FML instruction format (NFC)Bryan Chan2018-10-291-59/+65
* [AArch64] Implement FP16FML intrinsicsBryan Chan2018-10-251-9/+35
* [AArch64][v8.5A] Add Memory Tagging instructionsOliver Stannard2018-10-021-4/+111
* [AArch64] Refactor immediate details out of add/sub tblgen class (NFCI)Oliver Stannard2018-09-271-13/+19
* [AArch64][v8.5A] Add Branch Target Identification instructionsOliver Stannard2018-09-271-0/+15
* [AArch64][v8.5A] Add FRINT[32,64][Z,X] instructionsOliver Stannard2018-09-271-1/+36
* [AArch64] Extend single-operand FP insns to match Arm ARM (NFCI)Oliver Stannard2018-09-261-6/+7
* [AArch64] Refactor instructions that write PSTATE (NFCI)Oliver Stannard2018-09-261-9/+15
* [AArch64] Optimise load(adr address) to ldr addressDavid Green2018-08-301-3/+3
* [ARM/AArch64] Support FP16 +fp16fml instructionsBernard Ogden2018-08-171-0/+22
* [AArch64] Fix FCCMP with FP16 operandsBryan Chan2018-08-011-1/+3
* [AArch64][SVE] Asm: Add MOVPRFX instructions.Sander de Smalen2018-07-301-0/+15
* [AArch64] Armv8.2-A: add the crypto extensionsSjoerd Meijer2018-07-261-3/+98
* [AArch64] Armv8.4-A: LDAPR & STLR with immediate offset instructions (cont'd)Sjoerd Meijer2018-07-131-2/+15
* [AArch64] Armv8.4-A: LDAPR & STLR with immediate offset instructionsSjoerd Meijer2018-07-121-0/+13
* Recommit: [AArch64] Armv8.4-A: Flag manipulation instructionsSjoerd Meijer2018-07-061-0/+34
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