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path: root/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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* Silencing an MSVC C4334 warning ('<<' : result of 32-bit shift implicitly con...Aaron Ballman2014-09-021-1/+1
* AArch64: Silence -Wabsolute-value warning with std::absReid Kleckner2014-08-291-1/+2
* Fix typos in comments, NFCRobin Morisset2014-08-291-2/+1
* Remove spurious mask operations from AArch64 add->compares on 16 and 8 bit va...Louis Gerbarg2014-08-291-0/+263
* AArch64: only try to get operand of a known node.Tim Northover2014-08-291-5/+5
* AArch64: skip select/setcc combine in complex case.Tim Northover2014-08-291-8/+10
* [AArch64] Fix some failures exposed by value type v4f16 and v8f16.Jiangning Liu2014-08-291-2/+2
* AArch64: More correctly constrain target vector extend lowering.Jim Grosbach2014-08-281-3/+3
* Generate CMN when comparing a short int with minusDavid Xu2014-08-281-3/+41
* Teach the AArch64 backend about v4f16 and v8f16Oliver Stannard2014-08-271-8/+96
* Simplify creation of a bunch of ArrayRefs by using None, makeArrayRef or just...Craig Topper2014-08-271-2/+2
* Hide two different AlignMode enums in anonymous namespaces. This bug is repor...Alexey Samsonov2014-08-191-0/+2
* Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backendsRobin Morisset2014-08-181-4/+2
* Teach the AArch64 backend to handle f16Oliver Stannard2014-08-181-0/+9
* [ARM,AArch64] Do not tail-call to an externally-defined function with weak li...Oliver Stannard2014-08-181-0/+13
* [AArch64] Narrow arguments passed in wrong position on the stack inAmara Emerson2014-08-151-2/+2
* AArch64: Tidy up a few comments.Jim Grosbach2014-08-111-2/+2
* Remove the target machine from CCState. Previously it was only usedEric Christopher2014-08-061-17/+17
* [AArch64] Conditional selects are expensive on out-of-order cores.James Molloy2014-08-061-0/+4
* AArch64: Add support for instruction prefetch intrinsicYi Kong2014-08-051-2/+2
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-4/+8
* [AArch64] Generate tbz/tbnz when comparing against zero.Chad Rosier2014-08-011-10/+16
* Make sure no loads resulting from load->switch DAGCombine are marked invariantLouis Gerbarg2014-07-311-1/+1
* Add alignment value to allowsUnalignedMemoryAccessMatt Arsenault2014-07-271-1/+1
* AArch64: fix conversion of 'J' inline asm constraints.Tim Northover2014-07-271-1/+3
* [stack protector] Fix a potential security bug in stack protector where theAkira Hatanaka2014-07-251-0/+4
* Run sort_includes.py on the AArch64 backend.Benjamin Kramer2014-07-251-1/+1
* AArch64: refactor ReconstructShuffle functionTim Northover2014-07-241-109/+124
* [AArch64] Fix a bug generating incorrect instruction when building small vector.Kevin Qin2014-07-241-38/+63
* [X86,AArch64] Extend vcmp w/ unary op combine to work w/ more constants.Jim Grosbach2014-07-231-3/+3
* X86: restrict combine to when type sizes are safe.Jim Grosbach2014-07-231-3/+5
* [AArch64] Lower sdiv x, pow2 using add + select + shift.Chad Rosier2014-07-231-0/+42
* AArch64: implement efficient f16 bitcastsTim Northover2014-07-181-0/+43
* AArch64: support f16 extend/trunc operations.Tim Northover2014-07-181-0/+1
* AArch64: Constant fold converting vector setcc results to float.Jim Grosbach2014-07-181-0/+51
* AArch64: fall back to generic code for out of range extract/insert.Tim Northover2014-07-151-6/+8
* ARM: Allow __fp16 as a function arg or return type for AArch64Oliver Stannard2014-07-111-0/+2
* [AArch64] Normalize all constants to build a vector.Kevin Qin2014-07-071-1/+27
* [codegen,aarch64] Add a target hook to the code generator to controlChandler Carruth2014-07-031-0/+12
* [DAG] Pass the argument list to the CallLoweringInfo via move semantics. NFCI.Juergen Ributzka2014-07-011-1/+1
* AArch64: fix comment typoTim Northover2014-07-011-1/+1
* [AArch64] Convert mul x, -(pow2 +/- 1) to shift + add/sub.Chad Rosier2014-06-301-17/+39
* Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the...Craig Topper2014-06-191-3/+1
* [AArch64] Fix a pattern match failure caused by creating improper CONCAT_VECTOR.Kevin Qin2014-06-181-27/+39
* Replace some assert(0)'s with llvm_unreachable.Craig Topper2014-06-181-2/+2
* [AArch64] Fix a fencepost error in lowering for llvm.aarch64.neon.uqshl.James Molloy2014-06-161-1/+1
* AArch64: improve handling & modelling of FP_TO_XINT nodes.Tim Northover2014-06-151-7/+5
* AArch64: improve vector [su]itofp handling.Tim Northover2014-06-151-22/+13
* Move AArch64TargetLowering to AArch64Subtarget.Eric Christopher2014-06-101-1/+1
* [AArch64] When combining constant mul of power of 2 plus/minus 1, prefer shiftChad Rosier2014-06-091-9/+9
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