| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fix the bug when handling shufflevector for aarch64. | Dehao Chen | 2017-06-26 | 1 | -2/+3 |
| * | [AARCH64][LSE] Preliminary support for ARMv8.1 LSE Atomics. | Christof Douma | 2017-06-21 | 1 | -1/+10 |
| * | [AArch64] Add indexed check to splitStores. NFC. | Nirav Dave | 2017-06-15 | 1 | -1/+1 |
| * | Sort the remaining #include lines in include/... and lib/.... | Chandler Carruth | 2017-06-06 | 1 | -3/+3 |
| * | [SelectionDAG] Set ISD::FPOWI to Expand by default | Craig Topper | 2017-05-30 | 1 | -3/+0 |
| * | Fix signedness of constant. NFC. | Nirav Dave | 2017-05-26 | 1 | -5/+5 |
| * | [AArch64] Prevent nested ADDs from address calc in splitStoreSplat. NFC | Nirav Dave | 2017-05-24 | 1 | -2/+12 |
| * | [AArch64] Fix PRR33100. | Akira Hatanaka | 2017-05-23 | 1 | -7/+10 |
| * | Re-commit r302678, fixing PR33053. | Amara Emerson | 2017-05-16 | 1 | -269/+72 |
| * | Revert r302678 "[AArch64] Enable use of reduction intrinsics." | Hans Wennborg | 2017-05-15 | 1 | -72/+269 |
| * | [AArch64] Enable use of reduction intrinsics. | Amara Emerson | 2017-05-10 | 1 | -269/+72 |
| * | Suppress all uses of LLVM_END_WITH_NULL. NFC. | Serge Guelton | 2017-05-09 | 1 | -1/+1 |
| * | Add extra operand to CALLSEQ_START to keep frame part set up previously | Serge Pavlov | 2017-05-09 | 1 | -3/+1 |
| * | [AARCH64][NEON] Add support for ISD::ABS lowering | Simon Pilgrim | 2017-05-08 | 1 | -0/+6 |
| * | Generalize the specialized flag-carrying SDNodes by moving flags into SDNode. | Amara Emerson | 2017-05-01 | 1 | -6/+6 |
| * | [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem... | Craig Topper | 2017-04-28 | 1 | -15/+15 |
| * | [AArch64] Improve code generation for logical instructions taking | Akira Hatanaka | 2017-04-21 | 1 | -0/+141 |
| * | [AArch64] Refactor instruction selection lowering for addresses. NFCI | Joel Jones | 2017-04-21 | 1 | -85/+79 |
| * | Revert r300932 and r300930. | Akira Hatanaka | 2017-04-21 | 1 | -139/+0 |
| * | [AArch64] Use suffix ULL to shift a 64-bit value. | Akira Hatanaka | 2017-04-21 | 1 | -1/+1 |
| * | [AArch64] Improve code generation for logical instructions taking | Akira Hatanaka | 2017-04-21 | 1 | -0/+139 |
| * | Revert "[AArch64] Improve code generation for logical instructions taking" | Akira Hatanaka | 2017-04-20 | 1 | -139/+0 |
| * | [AArch64] Improve code generation for logical instructions taking | Akira Hatanaka | 2017-04-20 | 1 | -0/+139 |
| * | DAG: Make mayBeEmittedAsTailCall parameter const | Matt Arsenault | 2017-04-18 | 1 | -1/+1 |
| * | [Target] Use hasOneUse() instead of getNumUses(). | Davide Italiano | 2017-04-18 | 1 | -1/+1 |
| * | AArch64: support nonlazybind | Tim Northover | 2017-04-17 | 1 | -19/+15 |
| * | [AArch64] Avoid partial register writes on lane 0 of BUILD_VECTOR for i8/i16/f16 | Adam Nemet | 2017-04-13 | 1 | -3/+8 |
| * | [ARM/AArch64] Ensure valid vector element types for interleaved accesses | Matthew Simpson | 2017-04-10 | 1 | -6/+24 |
| * | [AArch64] Allow global register asm("x18") or asm("w18") under -ffixed-x18 | Petr Hosek | 2017-04-07 | 1 | -0/+5 |
| * | [AArch64] Avoid partial register deps on insertelt of load into lane 0. | Ahmed Bougacha | 2017-04-04 | 1 | -11/+5 |
| * | [AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia | Petr Hosek | 2017-04-04 | 1 | -1/+1 |
| * | [DAGCombiner] Add vector demanded elements support to computeKnownBitsForTarg... | Simon Pilgrim | 2017-03-31 | 1 | -1/+1 |
| * | [AArch64ISelLowering] Remove `else` after `return` in LowerGlobalTLSAddress. | Davide Italiano | 2017-03-30 | 1 | -1/+1 |
| * | [AArch64] Simplify isSingExtended()/isZeroExtended(). NFCI. | Davide Italiano | 2017-03-30 | 1 | -10/+4 |
| * | Rename AttributeSet to AttributeList | Reid Kleckner | 2017-03-21 | 1 | -3/+3 |
| * | Make library calls sensitive to regparm module flag (Fixes PR3997). | Nirav Dave | 2017-03-18 | 1 | -2/+3 |
| * | Capitalize ArgListEntry fields. NFC. | Nirav Dave | 2017-03-18 | 1 | -2/+2 |
| * | In visitSTORE, always use FindBetterChain, rather than only when UseAA is ena... | Nirav Dave | 2017-03-14 | 1 | -1/+1 |
| * | [SDAG] Revert r296476 (and r296486, r296668, r296690). | Chandler Carruth | 2017-03-03 | 1 | -1/+1 |
| * | [ARM/AArch64] Support wide interleaved accesses | Matthew Simpson | 2017-03-02 | 1 | -40/+124 |
| * | In visitSTORE, always use FindBetterChain, rather than only when UseAA is ena... | Nirav Dave | 2017-02-28 | 1 | -1/+1 |
| * | Revert "In visitSTORE, always use FindBetterChain, rather than only when UseA... | Nirav Dave | 2017-02-26 | 1 | -1/+1 |
| * | In visitSTORE, always use FindBetterChain, rather than only when UseAA is ena... | Nirav Dave | 2017-02-25 | 1 | -1/+1 |
| * | [Fuchsia] Use thread-pointer ABI slots for stack-protector and safe-stack | Petr Hosek | 2017-02-24 | 1 | -22/+29 |
| * | [CodeGenPrepare] Sink and duplicate more 'and' instructions. | Geoff Berry | 2017-02-21 | 1 | -2/+13 |
| * | [ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not ... | Arnold Schwaighofer | 2017-02-08 | 1 | -1/+2 |
| * | GlobalISel: translate @llvm.va_start intrinsic. | Tim Northover | 2017-02-08 | 1 | -0/+8 |
| * | [AArch64] Fix incorrect MachinePointerInfo in splitStoreSplat | John Brawn | 2017-02-06 | 1 | -2/+3 |
| * | Revert "In visitSTORE, always use FindBetterChain, rather than only when UseA... | Nirav Dave | 2017-02-02 | 1 | -1/+1 |
| * | In visitSTORE, always use FindBetterChain, rather than only when UseAA is ena... | Nirav Dave | 2017-02-02 | 1 | -1/+1 |
