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path: root/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
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* [AArch64][v8.5A] Restrict indirect tail calls to use x16/17 only when using BTIOliver Stannard2018-10-081-1/+2
* Revert r343317Luke Cheeseman2018-09-281-6/+0
* Reapply changes reverted by r343235Luke Cheeseman2018-09-281-0/+6
* Revert r343192 as an ubsan build is currently failingLuke Cheeseman2018-09-271-6/+0
* Reapply changes reverted in r343114, lldb patch to follow shortlyLuke Cheeseman2018-09-271-0/+6
* Revert r343112 as CallFrameString API change has broken lldb buildsLuke Cheeseman2018-09-261-6/+0
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-09-261-0/+6
* Revert r343089 "[AArch64] - Return address signing dwarf support"Hans Wennborg2018-09-261-6/+0
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-09-261-0/+6
* [AArch64] Support adding X[8-15,18] registers as CSRs.Tri Vo2018-09-221-2/+2
* [AArch64] Implement aarch64_vector_pcs codegen support.Sander de Smalen2018-09-121-37/+82
* [AArch64] NFC: Refactoring to prepare for vector PCS.Sander de Smalen2018-09-121-39/+74
* [AArch64] Support reserving x1-7 registers.Nick Desaulniers2018-09-071-1/+1
* [AArch64] Add Tiny Code Model for AArch64David Green2018-08-221-0/+1
* [AArch64] - Generate pointer authentication instructionsLuke Cheeseman2018-08-171-0/+59
* [MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth2018-08-161-1/+1
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-23/+20
* [DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen2018-05-091-1/+1
* [AArch64] Place the first ldp at the end when ReverseCSRRestoreSeq is trueFrancis Visoiu Mistrih2018-04-271-30/+45
* [AArch64] Fix scavenged spill slot base when stack realignment required.Geoff Berry2018-04-261-2/+10
* [AArch64] Move AFI->setRedZone(false) to top of emitPrologueJessica Paquette2018-04-121-1/+5
* [AArch64] Fix regression after r329691Francis Visoiu Mistrih2018-04-111-1/+1
* [AArch64] Use FP to access the emergency spill slotFrancis Visoiu Mistrih2018-04-101-10/+28
* AArch64: Implement support for the shadowcallstack attribute.Peter Collingbourne2018-04-041-5/+71
* [MachineOutliner] Keep track of fns that use a redzone in AArch64FunctionInfoJessica Paquette2018-04-031-2/+4
* [AArch64] Emit CSR loads in the same order as storesFrancis Visoiu Mistrih2018-03-141-14/+70
* Support for the mno-stack-arg-probe flagHans Wennborg2018-02-231-1/+2
* AArch64: Fix emergency spillslot being out of reach for large callframesMatthias Braun2018-01-191-6/+26
* Revert "AArch64: Fix emergency spillslot being out of reach for large callfra...Matthias Braun2018-01-101-26/+6
* AArch64: Fix emergency spillslot being out of reach for large callframesMatthias Braun2018-01-101-6/+26
* [AArch64] Implement stack probing for windowsMartin Storsjo2017-12-201-9/+77
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-11/+11
* [CodeGen] Always use `printReg` to print registers in both MIR and debugFrancis Visoiu Mistrih2017-11-301-5/+5
* [CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih2017-11-281-2/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* [AArch64]: range loopify frame-loweringJaved Absar2017-10-301-2/+2
* Add "Restored" flag to CalleeSavedInfoKrzysztof Parzyszek2017-08-101-1/+1
* [AArch64] Rewrite stack frame handling for win64 vararg functionsMartin Storsjo2017-08-011-22/+30
* [AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as wellMartin Storsjo2017-07-171-1/+2
* [AArch64] Implement support for windows style vararg functionsMartin Storsjo2017-07-131-1/+10
* Fix PR33031: correct the estimate of maximum offset for instructions spilling...Kristof Beyls2017-05-301-5/+30
* AArch64/PEI: Do not add reserved regs to liveinsMatthias Braun2017-05-271-2/+5
* LivePhysRegs: Rework constructor + documentation; NFCMatthias Braun2017-05-261-2/+2
* BitVector: add iterators for set bitsFrancis Visoiu Mistrih2017-05-171-2/+1
* Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-2/+5
* AArch64FrameLowering: Check if the ExtraCSSpill register is actually unusedMatthias Braun2017-04-211-6/+6
* Reduce the number of times we query the subtarget for the same information.Eric Christopher2017-03-311-5/+4
* Rename AttributeSet to AttributeListReid Kleckner2017-03-211-1/+1
* [AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; ot...Eugene Zelenko2017-01-251-4/+28
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