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path: root/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
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* [AArch64] Add Tiny Code Model for AArch64David Green2018-08-221-25/+44
* [AArch64] Improve orr+movk sequences for MOVi64imm.Eli Friedman2018-05-241-115/+96
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-14/+14
* [AArch64] Fold adds with tprel_lo12_nc and secrel_lo12 into a following ldr/strMartin Storsjo2018-03-121-0/+10
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* Insert IMPLICIT_DEFS for undef uses in tail mergingMatthias Braun2017-09-061-12/+10
* Revert "[AArch64] Simplify AES*Tied pseudo expansion (NFC)."Tim Northover2017-08-031-3/+10
* [AArch64] Simplify AES*Tied pseudo expansion (NFC).Florian Hahn2017-08-021-10/+3
* [AArch64] Tie source and destination operands for AESMC/AESIMC. Florian Hahn2017-07-291-0/+12
* [AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko2017-07-251-10/+30
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* AArch64: Fix cmpxchg O0 expansionMatthias Braun2017-05-261-58/+61
* LivePhysRegs: Rework constructor + documentation; NFCMatthias Braun2017-05-261-2/+2
* AArch64: lower "fence singlethread" to a pure compiler barrier.Tim Northover2017-04-201-0/+1
* [AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsiaPetr Hosek2017-04-041-1/+6
* [AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as not having side effects.Chad Rosier2017-03-271-0/+8
* [AArch64] Generate literals by the little endEvandro Menezes2017-01-181-6/+6
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-21/+19
* AArch64: Enable post-ra liveness updatesMatthias Braun2016-12-161-1/+6
* AArch64: fix 128-bit cmpxchg at -O0 (again, again).Tim Northover2016-12-011-6/+14
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-3/+1
* [AArch64] Register AArch64LoadStoreOptimizer so it can be run by llc -run-pas...Geoff Berry2016-07-201-4/+0
* Move helper classes into anonymous namespaces. NFC.Benjamin Kramer2016-05-151-1/+1
* livePhysRegs: Pass MBB by reference in addLive{Ins|Outs}(); NFCMatthias Braun2016-05-031-2/+2
* LivePhysRegs: Automatically determine presence of pristine regs.Matthias Braun2016-05-031-2/+2
* [AArch64] Set AddPristinesAndCSRs to expandCMP_SWAP LivePhysRegs.Ahmed Bougacha2016-04-271-2/+2
* [AArch64] Set correct successors in CMPXCHG pseudo expansion.Ahmed Bougacha2016-04-271-2/+4
* AArch64: expand cmpxchg after regalloc at -O0.Tim Northover2016-04-141-3/+201
* AArch64: avoid clobbering SP for dead MOVimm pseudos.Tim Northover2016-04-011-1/+8
* [AArch64] Register (existing) AArch64ExpandPseudo pass with LLVM pass manager.Chad Rosier2015-08-051-2/+13
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
* Transfer implicit operands when expanding the RET_ReallyLR pseudo instruction.Juergen Ributzka2015-03-301-3/+6
* MathExtras: Bring Count(Trailing|Leading)Ones and CountPopulation in line wit...Benjamin Kramer2015-02-121-2/+2
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-2/+1
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+3
* AArch64: remove unnecessary pseudo-instruction.Tim Northover2014-07-141-13/+0
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-241-0/+749
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