summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
Commit message (Collapse)AuthorAgeFilesLines
* AArch64: support arm64_32, an ILP32 slice for watchOS.Tim Northover2019-09-121-3/+19
| | | | | | | | This is the main CodeGen patch to support the arm64_32 watchOS ABI in LLVM. FastISel is mostly disabled for now since it would generate incorrect code for ILP32. llvm-svn: 371722
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-18/+22
| | | | | | | | | | | | | | | | The DEBUG() macro is very generic so it might clash with other projects. The renaming was done as follows: - git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g' - git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM - Manual change to APInt - Manually chage DOCS as regex doesn't match it. In the transition period the DEBUG() macro is still present and aliased to the LLVM_DEBUG() one. Differential Revision: https://reviews.llvm.org/D43624 llvm-svn: 332240
* Revert "[CodeGen] Move printing '\n' from MachineInstr::print to ↵Francis Visoiu Mistrih2018-02-191-28/+16
| | | | | | | | MachineBasicBlock::print" This reverts commit r324681. llvm-svn: 325505
* [CodeGen] Move printing '\n' from MachineInstr::print to ↵Francis Visoiu Mistrih2018-02-081-16/+28
| | | | | | | | | MachineBasicBlock::print MBB.print wasn't printing it, but the MIRPrinter is printing it. The goal is to unify that as much as possible. llvm-svn: 324681
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
| | | | | | The Function can never be nullptr so we can return a reference. llvm-svn: 320884
* Remove redundant includes from lib/Target/AArch64.Michael Zolotukhin2017-12-131-4/+0
| | | | llvm-svn: 320634
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
| | | | | | | | All these headers already depend on CodeGen headers so moving them into CodeGen fixes the layering (since CodeGen depends on Target, not the other way around). llvm-svn: 318490
* AArch64CollectLOH: Rewrite as block-local analysis.Matthias Braun2017-01-061-842/+281
| | | | | | | | | | | | | | | | | | | | | Re-apply r288561: This time with a fix where the ADDs that are part of a 3 instruction LOH would not invalidate the "LastAdrp" state. This fixes http://llvm.org/PR31361 Previously this pass was using up to 5% compile time in some cases which is a bit much for what it is doing. The pass featured a full blown data-flow analysis which in the default configuration was restricted to a single block. This rewrites the pass under the assumption that we only ever work on a single block. This is done in a single pass maintaining a state machine per general purpose register to catch LOH patterns. Differential Revision: https://reviews.llvm.org/D27329 This reverts commit 9e6cedb0a4f14364d6511597a9160305e7d34493. llvm-svn: 291266
* Revert "AArch64CollectLOH: Rewrite as block-local analysis."Matthias Braun2016-12-171-279/+841
| | | | | | | | It is still breaking Chrome. http://llvm.org/PR31361 This reverts commit r290026. llvm-svn: 290047
* AArch64CollectLOH: Rewrite as block-local analysis.Matthias Braun2016-12-171-841/+279
| | | | | | | | | | | | | | | | | Re-apply r288561: Liveness tracking should be correct now after r290014. Previously this pass was using up to 5% compile time in some cases which is a bit much for what it is doing. The pass featured a full blown data-flow analysis which in the default configuration was restricted to a single block. This rewrites the pass under the assumption that we only ever work on a single block. This is done in a single pass maintaining a state machine per general purpose register to catch LOH patterns. Differential Revision: https://reviews.llvm.org/D27329 llvm-svn: 290026
* Revert "AArch64CollectLOH: Rewrite as block-local analysis."Matthias Braun2016-12-131-279/+841
| | | | | | | | | | | | | This is not always behaving as expected as it turns out block live-in lists are only correct most of the time. Still waiting for reviews on https://reviews.llvm.org/D27559 to have them correct all of the time. See also http://llvm.org/PR31361, rdar://25117107 This reverts commit r288567. This reverts commit r288561. llvm-svn: 289570
* AArch64CollectLOH: Rewrite as block-local analysis.Matthias Braun2016-12-031-841/+279
| | | | | | | | | | | | | | | Previously this pass was using up to 5% compile time in some cases which is a bit much for what it is doing. The pass featured a full blown data-flow analysis which in the default configuration was restricted to a single block. This rewrites the pass under the assumption that we only ever work on a single block. This is done in a single pass maintaining a state machine per general purpose register to catch LOH patterns. Differential Revision: https://reviews.llvm.org/D27329 llvm-svn: 288561
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-3/+1
| | | | llvm-svn: 283004
* Replace incorrect "#ifdef DEBUG" with "#ifndef NDEBUG".James Y Knight2016-08-301-11/+15
| | | | | | | | | | | | | | | | | | | | The former is simply wrong -- the code will either never be used or will always be used, rather than being dependent upon whether it's built with debug assertions enabled. The macro DEBUG isn't ever set by the llvm build system. But, the macro DEBUG(X) is defined (unconditionally) if you happen to include llvm/Support/Debug.h. The code in Value.h which was erroneously protected by the #ifdef DEBUG didn't even compile -- you can't cast<> from an LLVMOpaqueValue directly. Fortunately, it was never invoked, as Core.cpp included Value.h before Debug.h. The conditionalized code in AArch64CollectLOH.cpp was previously always used, as it includes Debug.h. llvm-svn: 280056
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* [AArch64] Register passes so they can be run by llcDiana Picus2016-08-011-4/+0
| | | | | | | | | | | | | | Initialize all AArch64-specific passes in the TargetMachine so they can be run by llc. This can lead to conflicts in opt with some command line options that share the same name as the pass, so I took this opportunity to do some cleanups: * rename all relevant command line options from "aarch64-blah" to "aarch64-enable-blah" and update the tests accordingly * run clang-format on their declarations * move all these declarations to a common place (the TargetMachine) as opposed to having them scattered around (AArch64BranchRelaxation and AArch64AddressTypePromotion were the only offenders) llvm-svn: 277322
* Fix an ordering problem in r274431Manman Ren2016-07-051-1/+1
| | | | llvm-svn: 274582
* Use arrays or initializer lists to feed ArrayRefs instead of SmallVector ↵Benjamin Kramer2016-07-021-11/+4
| | | | | | | | where possible. No functionality change intended. llvm-svn: 274431
* Add optimization bisect opt-in calls for AArch64 passesAndrew Kaylor2016-04-251-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D19394 llvm-svn: 267479
* Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff2016-04-041-0/+5
| | | | | | | | | | | | | | Summary: This adds the same checks that were added in r264593 to all target-specific passes that run after register allocation. Reviewers: qcolombet Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D18525 llvm-svn: 265313
* [AArch64][CollectLOH] Remove an invalid assertion and add a test case ↵Quentin Colombet2015-08-311-3/+11
| | | | | | | | exposing it. rdar://problem/22491525 llvm-svn: 246472
* [AArch64][CollectLOH] Fix a regression that prevented us to detect chains ofQuentin Colombet2015-08-271-2/+6
| | | | | | | | | | | more than 2 instructions. I introduced this regression a while back and did not noticed it because I somehow forgot to push the initial test cases for the pass! Fix that as well! llvm-svn: 246239
* Make this less error prone by using a #define. NFC.Chad Rosier2015-08-051-5/+5
| | | | llvm-svn: 244048
* Change range-based for-loops to be -Wrange-loop-analysis clean.Richard Trieu2015-04-151-1/+1
| | | | | | No functionality change. llvm-svn: 234963
* Constify AArch64CollectLOH.cpp. NFCPete Cooper2015-03-111-7/+7
| | | | llvm-svn: 231969
* Clean up some uses of getSubtarget in AArch64.Eric Christopher2015-01-301-2/+1
| | | | llvm-svn: 227530
* Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.Eric Christopher2015-01-281-7/+4
| | | | llvm-svn: 227293
* AArch64: use std::fill instead of memsetDylan Noblesmith2014-08-261-1/+1
| | | | | | Followup based on review. llvm-svn: 216436
* Revert "AArch64: use std::vector for temp array"Dylan Noblesmith2014-08-261-4/+5
| | | | | | This reverts commit r216365. llvm-svn: 216433
* AArch64: unique_ptr-ify map structuresDylan Noblesmith2014-08-251-26/+9
| | | | llvm-svn: 216366
* AArch64: use std::vector for temp arrayDylan Noblesmith2014-08-251-5/+4
| | | | llvm-svn: 216365
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-4/+5
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* Run sort_includes.py on the AArch64 backend.Benjamin Kramer2014-07-251-4/+4
| | | | | | No functionality change. llvm-svn: 213938
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-241-0/+1117
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
OpenPOWER on IntegriCloud