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* [DWARFv5] llvm-mc -dwarf-version does not imply -g.Paul Robinson2018-06-121-7/+14
| | | | | | | | | | | | | Don't provide the assembler source as the "root file" unless the user asked to have debug info for the assembler source (with -g). If the source doesn't provide an explicit ".file 0" then (a) use the compilation directory as directory #0, and (b) use the file #1 info for file #0 also. Differential Revision: https://reviews.llvm.org/D48055 llvm-svn: 334512
* AMDGPU: Add 64-bit relative variant kindKonstantin Zhuravlyov2018-06-111-0/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D47601 llvm-svn: 334443
* [MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixupPeter Smith2018-06-068-26/+64
| | | | | | | | | | | | | | | | | | On targets like Arm some relaxations may only be performed when certain architectural features are available. As functions can be compiled with differing levels of architectural support we must make a judgement on whether we can relax based on the MCSubtargetInfo for the function. This change passes through the MCSubtargetInfo for the function to fixupNeedsRelaxation so that the decision on whether to relax can be made per function. In this patch, only the ARM backend makes use of this information. We must also pass the MCSubtargetInfo to applyFixup because some fixups skip error checking on the assumption that relaxation has occurred, to prevent code-generation errors applyFixup must see the same MCSubtargetInfo as fixupNeedsRelaxation. Differential Revision: https://reviews.llvm.org/D44928 llvm-svn: 334078
* [CodeGen] assume max/default throughput for unspecified instructionsSanjay Patel2018-06-051-7/+19
| | | | | | | | | | | | | This is a fix for the problem arising in D47374 (PR37678): https://bugs.llvm.org/show_bug.cgi?id=37678 We may not have throughput info because it's not specified in the model or it's not available with variant scheduling, so assume that those instructions can execute/complete at max-issue-width. Differential Revision: https://reviews.llvm.org/D47723 llvm-svn: 334055
* [MC][X86] Allow assembler variable assignment to register name.Nirav Dave2018-06-053-22/+35
| | | | | | | | | | | | | | | | | | | Summary: Allow extended parsing of variable assembler assignment syntax and modify X86 to permit VAR = register assignment. As we emit these as .set directives when possible, we inline such expressions in output assembly. Fixes PR37425. Reviewers: rnk, void, echristo Reviewed By: rnk Subscribers: nickdesaulniers, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D47545 llvm-svn: 334022
* [MC] Add assembler support for .cg_profile.Michael J. Spencer2018-06-026-0/+123
| | | | | | | | | | | | | | | Object FIle Representation At codegen time this is emitted into the ELF file a pair of symbol indices and a weight. In assembly it looks like: .cg_profile a, b, 32 .cg_profile freq, a, 11 .cg_profile freq, b, 20 When writing an ELF file these are put into a SHT_LLVM_CALL_GRAPH_PROFILE (0x6fff4c02) section as (uint32_t, uint32_t, uint64_t) tuples as (from symbol index, to symbol index, weight). Differential Revision: https://reviews.llvm.org/D44965 llvm-svn: 333823
* [MCSchedule] Add the ability to compute the latency and throughput ↵Andrea Di Biagio2018-05-311-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | information for MCInst. This patch extends the MCSchedModel API with new methods that can be used to obtain the latency and reciprocal througput information for an MCInst. Scheduling models have recently gained the ability to resolve variant scheduling classes associated with MCInst objects. Before, models were only able to resolve a variant scheduling class from a MachineInstr object. This patch is mainly required by D47374 to avoid regressing a pair of x86 specific -print-schedule tests for btver2. Patch D47374 introduces a new variant class to teach the btver scheduling model (x86 target) how to correctly compute the latency profile for some zero-idioms using the new scheduling predicates. The new methods added by this patch would be mainly used by llc when flag -print-schedule is specified. In particular, tests that contain inline assembly require that code is parsed at code emission stage into a sequence of MCInst. That forces the print-schedule functionality to query the latency/rthroughput information for MCInst instructions too. If we don't expose this new API, then we lose "-print-schedule" test coverage as soon as variant scheduling classes are added to the x86 models. The tablegen SubtargetEmitter changes teaches how to query latency profile information using a object that derives from TargetSubtargetInfo. Note that this should really have been part of r333286. To avoid code duplication, the logic that "resolves" variant scheduling classes for MCInst, has been moved to a common place in MC. That logic is used by the "resolveVariantSchedClass" methods redefined in override by the tablegen'd GenSubtargetInfo classes. Differential Revision: https://reviews.llvm.org/D47536 llvm-svn: 333650
* [WebAssembly] MC: Add compile-twice test and fix corresponding bugSam Clegg2018-05-302-1/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D47398 llvm-svn: 333494
* [RISCV] Add symbol diff relocation support for RISC-VAlex Bradbury2018-05-233-4/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For RISC-V it is desirable to have relaxation happen in the linker once addresses are known, and as such the size between two instructions/byte sequences in a section could change. For most assembler expressions, this is fine, as the absolute address results in the expression being converted to a fixup, and finally relocations. However, for expressions such as .quad .L2-.L1, the assembler folds this down to a constant once fragments are laid out, under the assumption that the difference can no longer change, although in the case of linker relaxation the differences can change at link time, so the constant is incorrect. One place where this commonly appears is in debug information, where the size of a function expression is in a form similar to the above. This patch extends the assembler to allow an AsmBackend to declare that it does not want the assembler to fold down this expression, and instead generate a pair of relocations that allow the linker to carry out the calculation. In this case, the expression is not folded, but when it comes to emitting a fixup, the generic FK_Data_* fixups are converted into a pair, one for the addition half, one for the subtraction, and this is passed to the relocation generating methods as usual. I have named these FK_Data_Add_* and FK_Data_Sub_* to indicate which half these are for. For RISC-V, which supports this via e.g. the R_RISCV_ADD64, R_RISCV_SUB64 pair of relocations, these are also set to always emit relocations relative to local symbols rather than section offsets. This is to deal with the fact that if relocations were calculated on e.g. .text+8 and .text+4, the result 12 would be stored rather than 4 as both addends are added in the linker. Differential Revision: https://reviews.llvm.org/D45181 Patch by Simon Cook. llvm-svn: 333079
* MC: Remove dead code. NFCI.Peter Collingbourne2018-05-221-11/+0
| | | | | | | This code appears to have been copied from the mach-o streamer. It has no effect in ELF because indirect symbols are specific to mach-o. llvm-svn: 332926
* MC: Introduce an ELF dwo object writer and teach llvm-mc about it.Peter Collingbourne2018-05-212-15/+103
| | | | | | | | Part of PR37466. Differential Revision: https://reviews.llvm.org/D47051 llvm-svn: 332875
* MC: Extract a derived class from ELFObjectWriter. NFCI.Peter Collingbourne2018-05-211-13/+19
| | | | | | | | | | This class will be used to create regular, non-split ELF files. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47049 llvm-svn: 332870
* MC: Separate creating a generic object writer from creating a target object ↵Peter Collingbourne2018-05-211-0/+26
| | | | | | | | | | | | | writer. NFCI. With this we gain a little flexibility in how the generic object writer is created. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47045 llvm-svn: 332868
* MC: Extract ELFObjectWriter's ELF writing functionality into an ELFWriter ↵Peter Collingbourne2018-05-211-350/+368
| | | | | | | | | | | class. NFCI. The idea is that we will be able to use this class to create multiple files. Differential Revision: https://reviews.llvm.org/D47048 llvm-svn: 332867
* MC: Remove stream and output functions from MCObjectWriter. NFCI.Peter Collingbourne2018-05-213-5/+3
| | | | | | | | Part of PR37466. Differential Revision: https://reviews.llvm.org/D47043 llvm-svn: 332864
* MC: Have the object writers return the number of bytes written. NFCI.Peter Collingbourne2018-05-215-17/+27
| | | | | | | | | | This removes the last external use of the stream. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47042 llvm-svn: 332863
* MC: Change object writers to use endian::Writer. NFCI.Peter Collingbourne2018-05-215-355/+364
| | | | | | | | Part of PR37466. Differential Revision: https://reviews.llvm.org/D47040 llvm-svn: 332861
* MC: Change MCAssembler::writeSectionData and writeFragmentPadding to take a ↵Peter Collingbourne2018-05-216-65/+50
| | | | | | | | | | | | | | raw_ostream. NFCI. Also clean up a couple of hacks where we were writing the section contents to another stream by setting the object writer's stream, writing and setting it back. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47038 llvm-svn: 332858
* MC: Change MCAsmBackend::writeNopData() to take a raw_ostream instead of an ↵Peter Collingbourne2018-05-212-8/+6
| | | | | | | | | | | | | MCObjectWriter. NFCI. To make this work I needed to add an endianness field to MCAsmBackend so that writeNopData() implementations know which endianness to use. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47035 llvm-svn: 332857
* Support: Simplify endian stream interface. NFCI.Peter Collingbourne2018-05-183-13/+7
| | | | | | | | | | | | Provide some free functions to reduce verbosity of endian-writing a single value, and replace the endianness template parameter with a field. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47032 llvm-svn: 332757
* MC: Change the streamer ctors to take an object writer instead of a stream. ↵Peter Collingbourne2018-05-185-16/+20
| | | | | | | | | | | | | | NFCI. The idea is that a client that wants split dwarf would create a specific kind of object writer that creates two files, and use it to create the streamer. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47050 llvm-svn: 332749
* [MC] Relax .fill size requirementsNirav Dave2018-05-184-33/+60
| | | | | | | | | | | | | | | Avoid requirement that number of values must be known at assembler time. Fixes PR33586. Reviewers: rnk, peter.smith, echristo, jyknight Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D46703 llvm-svn: 332741
* [RISCV] Add WasForced parameter to MCAsmBackend::fixupNeedsRelaxationAdvancedShiva Chen2018-05-182-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | For RISCV branch instructions, we need to preserve relocation types when linker relaxation enabled, so then linker could modify offset when the branch offsets changed. We preserve relocation types by define shouldForceRelocation. IsResolved return by evaluateFixup will always false when shouldForceRelocation return true. It will make RISCV MC Branch Relaxation always relax 16-bit branches to 32-bit form, even if the symbol actually could be resolved. To avoid 16-bit branches always relax to 32-bit form when linker relaxation enabled, we add a new parameter WasForced to indicate that the symbol actually couldn't be resolved and not forced by shouldForceRelocation return true. RISCVAsmBackend::fixupNeedsRelaxationAdvanced could relax branches with unresolved symbols by (!IsResolved && !WasForced). RISCV MC Branch Relaxation is needed because RISCV could perform 32-bit to 16-bit transformation in MC layer. Differential Revision: https://reviews.llvm.org/D46350 llvm-svn: 332696
* [WebAssembly] MC: Fix typo in commentSam Clegg2018-05-171-1/+1
| | | | llvm-svn: 332632
* [WebAssembly] Remove unused headers in MCWasmObjectWriterSam Clegg2018-05-161-3/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D46969 llvm-svn: 332535
* [WebAssembly] MC: Ensure that FUNCTION_OFFSET relocations are always against ↵Sam Clegg2018-05-161-1/+17
| | | | | | | | | | | | | | | | | function symbols. The getAtom() method wasn't doing what we needed in all cases. We want the symbols for the function which defines that section. We can compute this easily enough and we know that we have at most one function in each section. Once this lands I will revert rL331412 which is no longer needed. Fixes PR37409 Differential Revision: https://reviews.llvm.org/D46970 llvm-svn: 332517
* [WebAssembly] Move toString helpers to BinaryFormatSam Clegg2018-05-142-28/+2
| | | | | | | | Subscribers: dschuff, mgorny, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D46847 llvm-svn: 332305
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-142-35/+35
| | | | | | | | | | | | | | | | The DEBUG() macro is very generic so it might clash with other projects. The renaming was done as follows: - git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g' - git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM - Manual change to APInt - Manually chage DOCS as regex doesn't match it. In the transition period the DEBUG() macro is still present and aliased to the LLVM_DEBUG() one. Differential Revision: https://reviews.llvm.org/D43624 llvm-svn: 332240
* Correct compatibility with the GNU Assembler's handling of comparison opsBill Wendling2018-05-141-2/+20
| | | | | | | | GAS returns -1 for a comparison operator if the result is true and 0 if false. https://www.sourceware.org/binutils/docs-2.12/as.info/Infix-Ops.html#Infix%20Ops llvm-svn: 332215
* [WebAssembly] Create section start symbols automatically for all sectionsSam Clegg2018-05-104-22/+39
| | | | | | | | | | | These symbols only get included in the output symbols table if they are used in a relocation. This behaviour matches more closely the ELF object writer. Differential Revision: https://reviews.llvm.org/D46561 llvm-svn: 332005
* MC: Remove dead code. NFCI.Peter Collingbourne2018-05-081-1/+0
| | | | | | We should never emit an SHT_DYNSYM into an object file. llvm-svn: 331821
* [WebAssembly] MC: Use existing MCSymbol.Index field rather than inventing ↵Sam Clegg2018-05-081-15/+11
| | | | | | | | | | | | | extra mapping MCSymbol has getIndex/setIndex which are implementation defined and on other platforms are used to store the symbol table index. It makes sense to use this rather than invent a new mapping. Differential Revision: https://reviews.llvm.org/D46555 llvm-svn: 331705
* [MC] ELFObjectWriter: Removing unneeded variable and castSam Clegg2018-05-071-5/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D46289 llvm-svn: 331704
* [WebAssembly] Ensure all .debug_XXX section has proper symbol namesSam Clegg2018-05-072-4/+11
| | | | | | | | | | | Updated wasm section symbols names to match section name, and ensure all referenced sections will have a symbol (per DWARF spec v3, Figure 43) Patch by Yury Delendik! Differential Revision: https://reviews.llvm.org/D46543 llvm-svn: 331664
* [WebAssembly] MC: Create and use first class section symbolsSam Clegg2018-05-024-162/+117
| | | | | | Differential Revision: https://reviews.llvm.org/D46335 llvm-svn: 331413
* [MC] Factor MCObjectStreamer::addFragmentAtoms out of MachO streamer.Sam Clegg2018-05-023-24/+30
| | | | | | | | | This code previously existed only in MCMachOStreamer but is useful for WebAssembly too. See: D46335 Differential Revision: https://reviews.llvm.org/D46297 llvm-svn: 331412
* Fix release build breakageSam Clegg2018-05-021-0/+2
| | | | | | | This function was added in rL331220 but wasn't testing in release configurations. llvm-svn: 331320
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-015-47/+47
| | | | | | | | | | | | | | | | We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done Differential Revision: https://reviews.llvm.org/D46290 llvm-svn: 331272
* [MC] Add llvm_unreachable to toString to fix compile time warning.Florian Hahn2018-05-011-2/+1
| | | | | | | | | | | | | Without this change, GCC 7 raises the warning below: control reaches end of non-void function Reviewers: sbc100, andreadb Reviewed By: andreadb Differential Revision: https://reviews.llvm.org/D46304 llvm-svn: 331255
* NFC, Avoid a warning in WasmObjectWriterGabor Buella2018-05-011-0/+2
| | | | | | | | | | The warning was (introduced in r331220): lib/MC/WasmObjectWriter.cpp:51:1: warning: control reaches end of non-void function [-Wreturn-type] } ^ llvm-svn: 331251
* [WebAssembly] MC: Improve debug outputSam Clegg2018-04-301-8/+33
| | | | llvm-svn: 331220
* [MC] Change AsmParser to leverage Assembler during evaluationNirav Dave2018-04-305-20/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | Teach AsmParser to check with Assembler for when evaluating constant expressions. This improves the handing of preprocessor expressions that must be resolved at parse time. This idiom can be found as assembling-time assertion checks in source-level assemblers. Note that this relies on the MCStreamer to keep sufficient tabs on Section / Fragment information which the MCAsmStreamer does not. As a result the textual output may fail where the equivalent object generation would pass. This can most easily be resolved by folding the MCAsmStreamer and MCObjectStreamer together which is planned for in a separate patch. Currently, this feature is only enabled for assembly input, keeping IR compilation consistent between assembly and object generation. Reviewers: echristo, rnk, probinson, espindola, peter.smith Reviewed By: peter.smith Subscribers: eraman, peter.smith, arichardson, jyknight, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D45164 llvm-svn: 331218
* IWYU for llvm-config.h in llvm, additions.Nico Weber2018-04-3010-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | See r331124 for how I made a list of files missing the include. I then ran this Python script: for f in open('filelist.txt'): f = f.strip() fl = open(f).readlines() found = False for i in xrange(len(fl)): p = '#include "llvm/' if not fl[i].startswith(p): continue if fl[i][len(p):] > 'Config': fl.insert(i, '#include "llvm/Config/llvm-config.h"\n') found = True break if not found: print 'not found', f else: open(f, 'w').write(''.join(fl)) and then looked through everything with `svn diff | diffstat -l | xargs -n 1000 gvim -p` and tried to fix include ordering and whatnot. No intended behavior change. llvm-svn: 331184
* ELFObjectWriter: Allow one unique symver per symbolVlad Tsyrklevich2018-04-271-0/+4
| | | | | | | | | | | | | | | | | Summary: Only allow a single unique .symver alias per symbol. This matches the behavior of gas. I noticed that we ignored multiple mismatched symver directives looking at https://reviews.llvm.org/D45798 Reviewers: pcc, tejohnson, espindola Reviewed By: pcc Subscribers: emaste, arichardson, llvm-commits, kcc Differential Revision: https://reviews.llvm.org/D45845 llvm-svn: 331078
* [MC] Undo spurious commit added into r331052.Nirav Dave2018-04-275-40/+20
| | | | llvm-svn: 331055
* [MC] Provide default value for IsResolved.Nirav Dave2018-04-276-21/+41
| | | | llvm-svn: 331052
* [MC] Modify MCAsmStreamer to always build MCAssembler. NFCI.Nirav Dave2018-04-272-18/+33
| | | | llvm-svn: 331048
* [MC] Allow MCAssembler to be constructed without all subcomponents. NFCI.Nirav Dave2018-04-272-16/+35
| | | | llvm-svn: 331047
* [WebAssembly] Section symbols must have local bindingSam Clegg2018-04-271-1/+1
| | | | | | | | | | Summary: Also test for symbols information in test/MC/WebAssembly/debug-info.ll. Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D46160 llvm-svn: 331005
* [WebAssembly] Write DWARF data into wasm object fileSam Clegg2018-04-261-25/+164
| | | | | | | | | | | - Writes ".debug_XXX" into corresponding custom sections. - Writes relocation records into "reloc.debug_XXX" sections. Patch by Yury Delendik! Differential Revision: https://reviews.llvm.org/D44184 llvm-svn: 330982
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