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| author | Sanjay Patel <spatel@rotateright.com> | 2018-06-05 23:34:45 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-06-05 23:34:45 +0000 |
| commit | 59313be8d3389918d0a1bf704bcbdd889c073ffc (patch) | |
| tree | bcbbfe3bffbf20e582318ed609de8a66352d31cd /llvm/lib/MC | |
| parent | 6b5b5ce06c2d294d093a3ad782e7546d5fccd25b (diff) | |
| download | bcm5719-llvm-59313be8d3389918d0a1bf704bcbdd889c073ffc.tar.gz bcm5719-llvm-59313be8d3389918d0a1bf704bcbdd889c073ffc.zip | |
[CodeGen] assume max/default throughput for unspecified instructions
This is a fix for the problem arising in D47374 (PR37678):
https://bugs.llvm.org/show_bug.cgi?id=37678
We may not have throughput info because it's not specified in the model
or it's not available with variant scheduling, so assume that those
instructions can execute/complete at max-issue-width.
Differential Revision: https://reviews.llvm.org/D47723
llvm-svn: 334055
Diffstat (limited to 'llvm/lib/MC')
| -rw-r--r-- | llvm/lib/MC/MCSchedule.cpp | 26 |
1 files changed, 19 insertions, 7 deletions
diff --git a/llvm/lib/MC/MCSchedule.cpp b/llvm/lib/MC/MCSchedule.cpp index e3fa76ee03c..929bd7f6046 100644 --- a/llvm/lib/MC/MCSchedule.cpp +++ b/llvm/lib/MC/MCSchedule.cpp @@ -85,7 +85,7 @@ int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI, llvm_unreachable("unsupported variant scheduling class"); } -Optional<double> +double MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo &STI, const MCSchedClassDesc &SCDesc) { Optional<double> Throughput; @@ -99,18 +99,25 @@ MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo &STI, double Temp = NumUnits * 1.0 / I->Cycles; Throughput = Throughput ? std::min(Throughput.getValue(), Temp) : Temp; } - return Throughput ? 1 / Throughput.getValue() : Throughput; + if (Throughput.hasValue()) + return 1.0 / Throughput.getValue(); + + // If no throughput value was calculated, assume that we can execute at the + // maximum issue width scaled by number of micro-ops for the schedule class. + return ((double)SCDesc.NumMicroOps) / SM.IssueWidth; } -Optional<double> +double MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo &STI, const MCInstrInfo &MCII, const MCInst &Inst) const { - Optional<double> Throughput; unsigned SchedClass = MCII.get(Inst.getOpcode()).getSchedClass(); const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); + + // If there's no valid class, assume that the instruction executes/completes + // at the maximum issue width. if (!SCDesc->isValid()) - return Throughput; + return 1.0 / IssueWidth; unsigned CPUID = getProcessorID(); while (SCDesc->isVariant()) { @@ -124,7 +131,7 @@ MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo &STI, llvm_unreachable("unsupported variant scheduling class"); } -Optional<double> +double MCSchedModel::getReciprocalThroughput(unsigned SchedClass, const InstrItineraryData &IID) { Optional<double> Throughput; @@ -136,5 +143,10 @@ MCSchedModel::getReciprocalThroughput(unsigned SchedClass, double Temp = countPopulation(I->getUnits()) * 1.0 / I->getCycles(); Throughput = Throughput ? std::min(Throughput.getValue(), Temp) : Temp; } - return Throughput ? 1 / Throughput.getValue() : Throughput; + if (Throughput.hasValue()) + return 1.0 / Throughput.getValue(); + + // If there are no execution resources specified for this class, then assume + // that it can execute at the maximum default issue width. + return 1.0 / DefaultIssueWidth; } |

