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* Add support for C++11 enum classes in llvm.Eric Christopher2012-05-231-0/+5
| | | | | | Part of rdar://11496790 llvm-svn: 157303
* Untabify and 80-col.Eric Christopher2012-05-221-17/+17
| | | | llvm-svn: 157274
* Formatting consistency.Eric Christopher2012-05-221-3/+4
| | | | llvm-svn: 157273
* Only erase virtregs with no uses left.Jakob Stoklund Olesen2012-05-221-4/+15
| | | | | | | | | Also make sure registers aren't erased twice if the dead def mentions the register twice. This fixes PR12911. llvm-svn: 157254
* Fix use of an unitialized value in the LegalizeOps expansion for ISD::SUB. ↵Owen Anderson2012-05-211-1/+1
| | | | | | | | No in-tree targets exercise this path. Patch by Micah Villmow. llvm-svn: 157215
* Typo.Chad Rosier2012-05-211-1/+1
| | | | llvm-svn: 157195
* Give a small negative bias to giant edge bundles.Jakob Stoklund Olesen2012-05-211-0/+11
| | | | | | | | | | | | | | | | This helps compile time when the greedy register allocator splits live ranges in giant functions. Without the bias, we would try to grow regions through the giant edge bundles, usually to find out that the region became too big and expensive. If a live range has many uses in blocks near the giant bundle, the small negative bias doesn't make a big difference, and we still consider regions including the giant edge bundle. Giant edge bundles are usually connected to landing pads or indirect branches. llvm-svn: 157174
* Clear kill flags on the fly when joining intervals.Jakob Stoklund Olesen2012-05-201-36/+22
| | | | | | | | | | | With physreg joining out of the way, it is easy to recognize the instructions that need their kill flags cleared while testing for interference. This allows us to skip the final scan of all instructions for an 11% speedup of the coalescer pass. llvm-svn: 157169
* Constrain regclasses in PeepholeOptimizer.Jakob Stoklund Olesen2012-05-201-1/+10
| | | | | | | It can be necessary to restrict to a sub-class before accessing sub-registers. llvm-svn: 157164
* Constrain register classes in TailDup.Jakob Stoklund Olesen2012-05-201-3/+5
| | | | | | | When rewriting operands, make sure the new registers have a compatible register class. llvm-svn: 157163
* When legalising shifts, do not pre-build a list of operands whichPeter Collingbourne2012-05-201-10/+14
| | | | | | | may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve the other operands when calling UpdateNodeOperands. Fixes PR12889. llvm-svn: 157162
* Plug a leak when using MCJIT.Benjamin Kramer2012-05-201-1/+1
| | | | | | Found by valgrind. llvm-svn: 157160
* Use TargetMachine's register info instead of creating a new one and leaking it.Benjamin Kramer2012-05-201-1/+1
| | | | llvm-svn: 157155
* Properly constrain register classes for sub-registers.Jakob Stoklund Olesen2012-05-201-0/+2
| | | | | | Not all GR64 registers have sub_8bit sub-registers. llvm-svn: 157150
* Properly constrain register classes in 2-addr.Jakob Stoklund Olesen2012-05-201-0/+6
| | | | | | | X86 has 2-addr instructions with different constraints on the tied def and use operands. One is GR32, one is GR32_NOSP. llvm-svn: 157149
* Missed a push_back in r157147.Jakob Stoklund Olesen2012-05-201-1/+0
| | | | llvm-svn: 157148
* Avoid deleting extra copies when RegistersDefinedFromSameValue is true.Jakob Stoklund Olesen2012-05-201-7/+8
| | | | | | | This function adds copies to be erased to DupCopies, avoid also adding them to DeadCopies. llvm-svn: 157147
* Fix build bots.Jakob Stoklund Olesen2012-05-201-4/+4
| | | | | | Avoid looking at the operands of a potentially erased instruction. llvm-svn: 157146
* LiveRangeQuery simplifies shrinkToUses().Jakob Stoklund Olesen2012-05-201-10/+6
| | | | llvm-svn: 157145
* Use LiveRangeQuery in ScheduleDAGInstrs.Jakob Stoklund Olesen2012-05-201-11/+3
| | | | llvm-svn: 157144
* Eliminate some uses of struct LiveRange.Jakob Stoklund Olesen2012-05-201-12/+15
| | | | | | That struct ought to be a LiveInterval implementation detail. llvm-svn: 157143
* Use LiveRangeQuery instead of getLiveRangeContaining().Jakob Stoklund Olesen2012-05-201-4/+4
| | | | llvm-svn: 157142
* Simplify overlap check.Jakob Stoklund Olesen2012-05-191-8/+1
| | | | llvm-svn: 157137
* Fix 12892.Jakob Stoklund Olesen2012-05-192-4/+24
| | | | | | | | | | | | Dead code elimination during coalescing could cause a virtual register to be split into connected components. The following rewriting would be confused about the already joined copies present in the code, but without a corresponding value number in the live range. Erase all joined copies instantly when joining intervals such that the MI and LiveInterval representations are always in sync. llvm-svn: 157135
* Remove the late DCE in RegisterCoalescer.Jakob Stoklund Olesen2012-05-191-145/+2
| | | | | | | | | | | Dead code and joined copies are now eliminated on the fly, and there is no need for a post pass. This makes the coalescer work like other modern register allocator passes: Code is changed on the fly, there is no pending list of changes to be committed. llvm-svn: 157132
* Erase joined copies immediately.Jakob Stoklund Olesen2012-05-191-8/+10
| | | | | | | | | The late dead code elimination is no longer necessary. The test changes are cause by a register hint that can be either %rdi or %rax. The choice depends on the use list order, which this patch changes. llvm-svn: 157131
* Fix an ancient bug in removeCopyByCommutingDef().Jakob Stoklund Olesen2012-05-191-2/+5
| | | | | | | | | | | | | | | Before rewriting uses of one value in A to register B, check that there are no tied uses. That would require multiple A values to be rewritten. This bug can't bite in the current version of the code for a fairly subtle reason: A tied use would have caused 2-addr to insert a copy before the use. If the copy has been coalesced, it will be found by the same loop changed by this patch, and the optimization is aborted. This was exposed by 400.perlbench and lua after applying a patch that deletes joined copies aggressively. llvm-svn: 157130
* Collect inflatable virtual registers on the fly.Jakob Stoklund Olesen2012-05-191-16/+11
| | | | | | | There is no reason to defer the collection of virtual registers whose register class may be replaced with a larger class. llvm-svn: 157125
* Eliminate dead code after remat.Jakob Stoklund Olesen2012-05-191-1/+3
| | | | | | This will remove the original def once it has no more uses. llvm-svn: 157104
* Don't remat during updateRegDefsUses().Jakob Stoklund Olesen2012-05-191-22/+5
| | | | | | | | | | | Remaining virtreg->physreg copies were rematerialized during updateRegDefsUses(), but we already do the same thing in joinCopy() when visiting the physreg copy instruction. Eliminate the preserveSrcInt argument to reMaterializeTrivialDef(). It is now always true. llvm-svn: 157103
* Immediately erase trivially useless copies.Jakob Stoklund Olesen2012-05-191-2/+4
| | | | | | | There is no need for these instructions to stick around since they are known to be not dead. llvm-svn: 157102
* Run proper recursive dead code elimination during coalescing.Jakob Stoklund Olesen2012-05-192-21/+63
| | | | | | | | | | | | | | | Dead copies cause problems because they are trivial to coalesce, but removing them gived the live range a dangling end point. This patch enables full dead code elimination which trims live ranges to their uses so end points don't dangle. DCE may erase multiple instructions. Put the pointers in an ErasedInstrs set so we never risk visiting erased instructions in the work list. There isn't supposed to be any dead copies entering RegisterCoalescer, but they do slip by as evidenced by test/CodeGen/X86/coalescer-dce.ll. llvm-svn: 157101
* Allow LiveRangeEdit to be created with a NULL parent.Jakob Stoklund Olesen2012-05-194-9/+9
| | | | | | The dead code elimination with callbacks is still useful. llvm-svn: 157100
* Modernize naming convention for class members.Jakob Stoklund Olesen2012-05-181-20/+20
| | | | | | No functional change. llvm-svn: 157079
* Move all work list processing to copyCoalesceWorkList().Jakob Stoklund Olesen2012-05-181-39/+42
| | | | | | This will make it possible to filter out erased instructions later. llvm-svn: 157073
* Refactor data-in-code annotations.Jim Grosbach2012-05-181-12/+1
| | | | | | | | | | | | | | | | | | | | | | Use a dedicated MachO load command to annotate data-in-code regions. This is the same format the linker produces for final executable images, allowing consistency of representation and use of introspection tools for both object and executable files. Data-in-code regions are annotated via ".data_region"/".end_data_region" directive pairs, with an optional region type. data_region_directive := ".data_region" { region_type } region_type := "jt8" | "jt16" | "jt32" | "jta32" end_data_region_directive := ".end_data_region" The previous handling of ARM-style "$d.*" labels was broken and has been removed. Specifically, it didn't handle ARM vs. Thumb mode when marking the end of the section. rdar://11459456 llvm-svn: 157062
* Remove duplicate code that we could just fallthrough to.Eric Christopher2012-05-181-1/+0
| | | | llvm-svn: 157060
* Simplify RegisterCoalescer::copyCoalesceInMBB().Jakob Stoklund Olesen2012-05-181-48/+15
| | | | | | | | | It is no longer necessary to separate VirtCopies, PhysCopies, and ImpDefCopies. Implicitly defined copies are extremely rare after we added the ProcessImplicitDefs pass, and physical register copies are not joined any longer. llvm-svn: 157059
* Remove support for PhysReg joining.Jakob Stoklund Olesen2012-05-181-136/+14
| | | | | | | | | | | | | | | | | | | | | | | | This has been disabled for a while, and it is not a feature we want to support. Copies between physical and virtual registers are eliminated by good hinting support in the register allocator. Joining virtual and physical registers is really a form of register allocation, and the coalescer is not properly equipped to do that. In particular, it cannot backtrack coalescing decisions, and sometimes that would cause it to create programs that were impossible to register allocate, by exhausting a small register class. It was also very difficult to keep track of the live ranges of aliasing registers when extending the live range of a physreg. By disabling physreg joining, we can let fixed physreg live ranges remain constant throughout the register allocator super-pass. One type of physreg joining remains: A virtual register that has a single value which is a copy of a reserved register can be merged into the reserved physreg. This always lowers register pressure, and since we don't compute live ranges for reserved registers, there are no problems with aliases. llvm-svn: 157055
* Recommited reworked r156804:Stepan Dyatkovskiy2012-05-182-53/+29
| | | | | | SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced. llvm-svn: 157046
* Teach two-address pass to update the "source" map so it doesn't perform aEvan Cheng2012-05-181-1/+7
| | | | | | | | | non-profitable commute using outdated info. The test case would still fail because of poor pre-RA schedule. That will be fixed by MI scheduler. rdar://11472010 llvm-svn: 157038
* commentsAndrew Trick2012-05-171-2/+3
| | | | llvm-svn: 157020
* misched: trace ReadyQ.Andrew Trick2012-05-171-0/+8
| | | | llvm-svn: 157007
* misched: Added 3-level regpressure back-off.Andrew Trick2012-05-173-75/+288
| | | | | | | | | | | | | | | | | | Introduce the basic strategy for register pressure scheduling. 1) Respect target limits at all times. 2) Indentify critical register classes (pressure sets). Track pressure within the scheduled region. Avoid increasing scheduled pressure for critical registers. 3) Avoid exceeding the max pressure of the region prior to scheduling. Added logic for picking between the top and bottom ready Q's based on regpressure heuristics. Status: functional but needs to be asjusted to achieve good results. llvm-svn: 157006
* commentAndrew Trick2012-05-172-3/+1
| | | | llvm-svn: 157005
* regpressure: Fix getMaxUpwardPressureDelta.Andrew Trick2012-05-171-2/+6
| | | | llvm-svn: 157004
* misched: fix liveness iteratorsAndrew Trick2012-05-171-10/+16
| | | | llvm-svn: 157003
* whitespaceAndrew Trick2012-05-172-2/+3
| | | | llvm-svn: 157002
* Never clear <undef> flags on already joined copies.Jakob Stoklund Olesen2012-05-171-4/+6
| | | | | | | | | | | | | | | | | | | | | RegisterCoalescer set <undef> flags on all operands of copy instructions that are scheduled to be removed. This is so they won't affect shrinkToUses() by introducing false register reads. Make sure those <undef> flags are never cleared, or shrinkToUses() could cause live intervals to end at instructions about to be deleted. This would be a lot simpler if RegisterCoalescer could just erase joined copies immediately instead of keeping all the to-be-deleted instructions around. This fixes PR12862. Unfortunately, bugpoint can't create a sane test case for this. Like many other coalescer problems, this failure depends of a very fragile series of events. <rdar://problem/11474428> llvm-svn: 157001
* Fix a verifier bug.Jakob Stoklund Olesen2012-05-171-1/+1
| | | | | | Make sure useless (def-only) intervals also get verified. llvm-svn: 157000
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