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authorAndrew Trick <atrick@apple.com>2012-05-17 18:35:07 +0000
committerAndrew Trick <atrick@apple.com>2012-05-17 18:35:07 +0000
commit47a1feaea06bbda8c3a3c6a473356ab5379e72df (patch)
tree7daf1bb3b5635d948f2b3ab870aaf81581d6de6b /llvm/lib/CodeGen
parent1c646ac68bf3f759b30ed0f725c2f7821876690d (diff)
downloadbcm5719-llvm-47a1feaea06bbda8c3a3c6a473356ab5379e72df.tar.gz
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comment
llvm-svn: 157005
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/MachineScheduler.cpp2
-rw-r--r--llvm/lib/CodeGen/RegisterPressure.cpp2
2 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 41b4b719f27..1d810fdf16d 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -819,8 +819,6 @@ SUnit *ConvergingScheduler::pickNode(bool &IsTopNode) {
assert(TopQueue.empty() && BotQueue.empty() && "ReadyQ garbage");
return NULL;
}
- // As an initial placeholder heuristic, schedule in the direction that has
- // the fewest choices.
SUnit *SU;
if (ForceTopDown) {
SU = DAG->getSUnit(DAG->top());
diff --git a/llvm/lib/CodeGen/RegisterPressure.cpp b/llvm/lib/CodeGen/RegisterPressure.cpp
index fbd08cb575a..912ed0dd7b1 100644
--- a/llvm/lib/CodeGen/RegisterPressure.cpp
+++ b/llvm/lib/CodeGen/RegisterPressure.cpp
@@ -698,7 +698,7 @@ getMaxDownwardPressureDelta(const MachineInstr *MI, RegPressureDelta &Delta) {
unsigned Reg = VirtRegOpers.Uses[i];
const LiveInterval *LI = &LIS->getInterval(Reg);
// FIXME: allow the caller to pass in the list of vreg uses that remain to
- // be top-scheduled to avoid searching uses at each query.
+ // be bottom-scheduled to avoid searching uses at each query.
SlotIndex CurrIdx = LIS->getInstructionIndex(CurrPos).getRegSlot();
if (LI->killedAt(SlotIdx)
&& !findUseBetween(Reg, CurrIdx, SlotIdx, MRI, LIS)) {
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