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* X86 TLS: Implement review feedback.Lauro Ramos Venancio2007-04-211-1/+11
| | | | llvm-svn: 36318
* Revert Christopher Lamb's load/store alignment changes.Reid Spencer2007-04-213-79/+36
| | | | llvm-svn: 36309
* add support for alignment attributes on load/store instructionsChristopher Lamb2007-04-213-36/+79
| | | | llvm-svn: 36301
* Allow the lowering of ISD::GLOBAL_OFFSET_TABLE.Lauro Ramos Venancio2007-04-201-1/+1
| | | | llvm-svn: 36290
* Implement "general dynamic", "initial exec" and "local exec" TLS models forLauro Ramos Venancio2007-04-202-2/+22
| | | | | | X86 32 bits. llvm-svn: 36283
* VarInfo::UsedBlocks is no longer used. Remove.Evan Cheng2007-04-184-17/+2
| | | | llvm-svn: 36250
* allow SRL to simplify its operands, as it doesn't demand all bits as input.Chris Lattner2007-04-181-1/+7
| | | | llvm-svn: 36245
* When replacing a node in SimplifyDemandedBits, if the old node used anyChris Lattner2007-04-181-1/+8
| | | | | | | single-use nodes, they will be dead soon. Make sure to remove them before processing other nodes. This implements CodeGen/X86/shl_elim.ll llvm-svn: 36244
* fix a pastoChris Lattner2007-04-181-1/+1
| | | | llvm-svn: 36242
* Don't populate TryAgainList when coalescing only physical registers with ↵Evan Cheng2007-04-181-6/+6
| | | | | | virtual registers. llvm-svn: 36240
* Increment use count of new virtuals created during PHI elimination.Evan Cheng2007-04-181-0/+3
| | | | llvm-svn: 36233
* Fix a bug in my previous patch, grabbing the shift amount width from theChris Lattner2007-04-171-2/+2
| | | | | | wrong operand. llvm-svn: 36223
* Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used.Chris Lattner2007-04-171-5/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This compiles: int baz(long long a) { return (short)(((int)(a >>24)) >> 9); } into: _baz: srwi r2, r3, 1 extsh r3, r2 blr on PPC, instead of: _baz: slwi r2, r3, 8 srwi r2, r2, 9 extsh r3, r2 blr GCC produces: _baz: srwi r10,r4,24 insrwi r10,r3,24,0 srawi r9,r3,24 srawi r3,r10,9 extsh r3,r3 blr This implements CodeGen/PowerPC/shl_elim.ll llvm-svn: 36221
* Copy coalescing change to prevent a physical register from being pin to aEvan Cheng2007-04-172-86/+98
| | | | | | | | | | | | | long live interval that has low usage density. 1. Change order of coalescing to join physical registers with virtual registers first before virtual register intervals become too long. 2. Check size and usage density to determine if it's worthwhile to join. 3. If joining is aborted, assign virtual register live interval allocation preference field to the physical register. 4. Register allocator should try to allocate to the preferred register first (if available) to create identify moves that can be eliminated. llvm-svn: 36218
* Add a register allocation preference field; add a method to compute size of ↵Evan Cheng2007-04-171-0/+9
| | | | | | a live interval. llvm-svn: 36216
* Keep track of number of uses within the function per virtual register.Evan Cheng2007-04-171-0/+1
| | | | llvm-svn: 36214
* SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBitsChris Lattner2007-04-171-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | a chance to hack on it. This compiles: int baz(long long a) { return (short)(((int)(a >>24)) >> 9); } into: _baz: slwi r2, r3, 8 srwi r2, r2, 9 extsh r3, r2 blr instead of: _baz: srwi r2, r4, 24 rlwimi r2, r3, 8, 0, 23 srwi r2, r2, 9 extsh r3, r2 blr This implements CodeGen/PowerPC/sign_ext_inreg1.ll llvm-svn: 36212
* Fix problems in the PartSet lowering having to do with incorrect bit width.Reid Spencer2007-04-161-3/+5
| | | | llvm-svn: 36180
* Removed tabs everywhere except autogenerated & external files. Add makeAnton Korobeynikov2007-04-164-47/+47
| | | | | | target for tabs checking. llvm-svn: 36146
* disable switch lowering using shift/and. It still breaks ppc bootstrap forChris Lattner2007-04-141-0/+1
| | | | | | some reason. :( Will investigate. llvm-svn: 36011
* Fix PR1325: Case range optimization was performed in the case itAnton Korobeynikov2007-04-141-4/+2
| | | | | | shouldn't. Also fix some "latent" bug on 64-bit platforms llvm-svn: 35990
* disable shift/and lowering to work around PR1325 for now.Chris Lattner2007-04-141-1/+3
| | | | llvm-svn: 35985
* Fix PR1323 : we haven't updated phi nodes in good manner :)Anton Korobeynikov2007-04-131-0/+1
| | | | llvm-svn: 35963
* Make sure intrinsics that are lowered to functions make the function weakReid Spencer2007-04-121-2/+2
| | | | | | | linkage so we only end up with one of them in a program. These are, after all overloaded and templatish in nature. llvm-svn: 35956
* Fix bugs in generated code for part_select and part_set so that llc doesn'tReid Spencer2007-04-121-35/+44
| | | | | | barf when CBE is run with a program that contains these intrinsics. llvm-svn: 35946
* Fix a bug in PartSet. The replacement value needs to be zext or trunc toReid Spencer2007-04-121-3/+7
| | | | | | the size of the value, not just zext. Also, give better names to two BBs. llvm-svn: 35945
* the result of an inline asm copy can be an arbitrary VT that the registerChris Lattner2007-04-121-4/+21
| | | | | | | | class supports. In the case of vectors, this means we often get the wrong type (e.g. we get v4f32 instead of v8i16). Make sure to convert the vector result to the right type. This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll llvm-svn: 35944
* fold noop vbitconvert instructionsChris Lattner2007-04-121-0/+9
| | | | llvm-svn: 35943
* Fix weirdness handling single element vectors.Chris Lattner2007-04-121-5/+2
| | | | llvm-svn: 35941
* For PR1284:Reid Spencer2007-04-122-12/+199
| | | | | | Implement the "part_set" intrinsic. llvm-svn: 35938
* fix an infinite loop compiling ldecod, notice by JeffC.Chris Lattner2007-04-111-1/+1
| | | | llvm-svn: 35910
* Fix this harder.Chris Lattner2007-04-111-12/+19
| | | | llvm-svn: 35888
* don't create shifts by zero, fix some problems with my previous patchChris Lattner2007-04-111-3/+7
| | | | llvm-svn: 35887
* Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which oftenChris Lattner2007-04-111-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | allows other simplifications. For example, this compiles: int isnegative(unsigned int X) { return !(X < 2147483648U); } Into this code: x86: movl 4(%esp), %eax shrl $31, %eax ret arm: mov r0, r0, lsr #31 bx lr thumb: lsr r0, r0, #31 bx lr instead of: x86: cmpl $0, 4(%esp) sets %al movzbl %al, %eax ret arm: mov r3, #0 cmp r0, #0 movlt r3, #1 mov r0, r3 bx lr thumb: mov r2, #1 mov r1, #0 cmp r0, #0 blt LBB1_2 @entry LBB1_1: @entry cpy r2, r1 LBB1_2: @entry cpy r0, r2 bx lr Testcase here: test/CodeGen/Generic/ispositive.ll llvm-svn: 35883
* Codegen integer abs more efficiently using the trick from the PPC CWG. ThisChris Lattner2007-04-111-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | improves codegen on many architectures. Tests committed as CodeGen/*/iabs.ll X86 Old: X86 New: _test: _test: movl 4(%esp), %ecx movl 4(%esp), %eax movl %ecx, %eax movl %eax, %ecx negl %eax sarl $31, %ecx testl %ecx, %ecx addl %ecx, %eax cmovns %ecx, %eax xorl %ecx, %eax ret ret PPC Old: PPC New: _test: _test: cmpwi cr0, r3, -1 srawi r2, r3, 31 neg r2, r3 add r3, r3, r2 bgt cr0, LBB1_2 ; xor r3, r3, r2 LBB1_1: ; blr mr r3, r2 LBB1_2: ; blr ARM Old: ARM New: _test: _test: rsb r3, r0, #0 add r3, r0, r0, asr #31 cmp r0, #0 eor r0, r3, r0, asr #31 movge r3, r0 bx lr mov r0, r3 bx lr Thumb Old: Thumb New: _test: _test: neg r2, r0 asr r2, r0, #31 cmp r0, #0 add r0, r0, r2 bge LBB1_2 eor r0, r2 LBB1_1: @ bx lr cpy r0, r2 LBB1_2: @ bx lr Sparc Old: Sparc New: test: test: save -96, %o6, %o6 save -96, %o6, %o6 sethi 0, %l0 sra %i0, 31, %l0 sub %l0, %i0, %l0 add %i0, %l0, %l1 subcc %i0, -1, %l1 xor %l1, %l0, %i0 bg .BB1_2 restore %g0, %g0, %g0 nop retl .BB1_1: nop or %g0, %l0, %i0 .BB1_2: restore %g0, %g0, %g0 retl nop It also helps alpha/ia64 :) llvm-svn: 35881
* For PR1146:Reid Spencer2007-04-111-13/+13
| | | | | | | Put the parameter attributes in their own ParamAttr name space. Adjust the rest of llvm as a result. llvm-svn: 35877
* apparently some people commit without building the tree, or they forget toChris Lattner2007-04-102-2/+2
| | | | | | commit a LOT of files. llvm-svn: 35858
* No longer needed.Jeff Cohen2007-04-091-1/+0
| | | | llvm-svn: 35850
* remove dead target hooks.Chris Lattner2007-04-091-19/+0
| | | | llvm-svn: 35847
* remove some dead target hooks, subsumed by isLegalAddressingModeChris Lattner2007-04-091-17/+0
| | | | llvm-svn: 35840
* Use integer log for metric calculationAnton Korobeynikov2007-04-091-2/+2
| | | | llvm-svn: 35834
* Unbreak VC++ build.Jeff Cohen2007-04-091-2/+3
| | | | llvm-svn: 35817
* Next stage into switch lowering refactoringAnton Korobeynikov2007-04-091-19/+340
| | | | | | | | | | 1. Fix some bugs in the jump table lowering threshold 2. Implement much better metric for optimal pivot selection 3. Tune thresholds for different lowering methods 4. Implement shift-and trick for lowering small (<machine word length) cases with few destinations. Good testcase will follow. llvm-svn: 35816
* For PR1146:Reid Spencer2007-04-091-13/+17
| | | | | | Adapt handling of parameter attributes to use the new ParamAttrsList class. llvm-svn: 35814
* implement CodeGen/X86/inline-asm-x-scalar.ll:test3Chris Lattner2007-04-091-2/+9
| | | | llvm-svn: 35802
* add some assertionsChris Lattner2007-04-091-0/+13
| | | | llvm-svn: 35800
* Fix a bug introduced with my previous patch, where it didn't correctly handleChris Lattner2007-04-091-7/+9
| | | | | | | instructions which replace themselves when FI's are rewritten (common on ppc). This fixes CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll llvm-svn: 35789
* Fix CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll and PR1308:Chris Lattner2007-04-091-1/+5
| | | | | | | some instructions can have multiple frame indices in them. If this happens, rewrite all of them. llvm-svn: 35785
* Fix PR1316Chris Lattner2007-04-091-4/+4
| | | | llvm-svn: 35783
* Fix for CodeGen/X86/2007-04-08-InlineAsmCrash.ll and PR1314Chris Lattner2007-04-081-1/+1
| | | | llvm-svn: 35779
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