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* [SDag switch lowering] Simplify code a bit. No functional change intended.Benjamin Kramer2015-06-041-10/+9
| | | | llvm-svn: 239056
* CodeGenPrepare: Provide address space to isLegalAddressingModeMatt Arsenault2015-06-041-26/+40
| | | | | | Use -1 as the address space if it can't be determined. llvm-svn: 239052
* Pass address space to isLegalAddressingMode in DAGCombinerMatt Arsenault2015-06-041-1/+5
| | | | | | | No test because I don't know of a target that makes use of address spaces and indexed load / store. llvm-svn: 239051
* Switch lowering: fix assert in buildBitTests (PR23738)Hans Wennborg2015-06-041-1/+2
| | | | | | | | When checking (High - Low + 1).sle(BitWidth), BitWidth would be truncated to the size of the left-hand side. In the case of this PR, the left-hand side was i4, so BitWidth=64 got truncated to 0 and the assert failed. llvm-svn: 239048
* Don't create a MIN/MAX node if the underlying compare has more than one use.James Molloy2015-06-041-1/+5
| | | | | | | | | If the compare in a select pattern has another use then it can't be removed, so we'd just be creating repeated code if we created a min/max node. Spotted by Matt Arsenault! llvm-svn: 239037
* [SelectionDAG] Fix PR23603.Sanjoy Das2015-06-021-1/+11
| | | | | | | | | | | | | | | | | | | | | Summary: LLVM's MI level notion of invariant_load is different from LLVM's IR level notion of invariant_load with respect to dereferenceability. The IR notion of invariant_load only guarantees that all *non-faulting* invariant loads result in the same value. The MI notion of invariant load guarantees that the load can be legally moved to any location within its containing function. The MI notion of invariant_load is stronger than the IR notion of invariant_load -- an MI invariant_load is an IR invariant_load + a guarantee that the location being loaded from is dereferenceable throughout the function's lifetime. Reviewers: hfinkel, reames Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10075 llvm-svn: 238881
* Create a MCSymbolELF.Rafael Espindola2015-06-022-6/+8
| | | | | | | | | This create a MCSymbolELF class and moves SymbolSize since only ELF needs a size expression. This reduces the size of MCSymbol from 56 to 48 bytes. llvm-svn: 238801
* LiveRangeEdit: Fix liveranges not shrinking on subrange kill.Matthias Braun2015-06-011-3/+18
| | | | | | | | | | | | | | If a dead instruction we may not only have a last-use in the main live range but also in a subregister range if subregisters are tracked. We need to partially rebuild live ranges in both cases. The testcase only broke when subregister liveness was enabled. I commited it in the current form because there is currently no flag to enable/disable subregister liveness. This fixes PR23720. llvm-svn: 238785
* Disable MachineSink on convergent operations, similar to how IR Sink isOwen Anderson2015-06-011-0/+4
| | | | | | | restricted. No test because no in-tree target currently has convergent MachineInstr's. llvm-svn: 238763
* Add address space argument to isLegalAddressingModeMatt Arsenault2015-06-011-1/+2
| | | | | | | | | | This is important because of different addressing modes depending on the address space for GPU targets. This only adds the argument, and does not update any of the uses to provide the correct address space. llvm-svn: 238723
* [sdag] Add the helper I most want to the DAG -- building a bitcastChandler Carruth2015-05-301-0/+7
| | | | | | | | around a value using its existing SDLoc. Start using this in just one function to save omg lines of code. llvm-svn: 238638
* MC: Clean up MCExpr naming. NFC.Jim Grosbach2015-05-308-64/+64
| | | | llvm-svn: 238634
* SelectionDAG: fix logic for promoting shift typesFiona Glaser2015-05-291-15/+21
| | | | | | | | | | | r238503 fixed the problem of too-small shift types by promoting them during legalization, but the correct solution is to promote only the operands that actually demand promotion. This fixes a crash on an out-of-tree target caused by trying to promote an operand that can't be promoted. llvm-svn: 238632
* Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial typesBenjamin Kramer2015-05-293-6/+6
| | | | | | | | | | | | | | | | | | | | If the type isn't trivially moveable emplace can skip a potentially expensive move. It also saves a couple of characters. Call sites were found with the ASTMatcher + some semi-automated cleanup. memberCallExpr( argumentCountIs(1), callee(methodDecl(hasName("push_back"))), on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))), hasArgument(0, bindTemporaryExpr( hasType(recordDecl(hasNonTrivialDestructor())), has(constructExpr()))), unless(isInTemplateInstantiation())) No functional change intended. llvm-svn: 238602
* MachineCopyPropagation: Remove the copies instead of using KILL instructions.Matthias Braun2015-05-292-22/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some history here see the commit messages of r199797 and r169060. The original intent was to fix cases like: %EAX<def> = COPY %ECX<kill>, %RAX<imp-def> %RCX<def> = COPY %RAX<kill> where simply removing the copies would have RCX undefined as in terms of machine operands only the ECX part of it is defined. The machine verifier would complain about this so 169060 changed such COPY instructions into KILL instructions so some super-register imp-defs would be preserved. In r199797 it was finally decided to always do this regardless of super-register defs. But this is wrong, consider: R1 = COPY R0 ... R0 = COPY R1 getting changed to: R1 = KILL R0 ... R0 = KILL R1 It now looks like R0 dies at the first KILL and won't be alive until the second KILL, while in reality R0 is alive and must not change in this part of the program. As this only happens after register allocation there is not much code still performing liveness queries so the issue was not noticed. In fact I didn't manage to create a testcase for this, without unrelated changes I am working on at the moment. The fix is simple: As of r223896 the MachineVerifier allows reads from partially defined registers, so the whole transforming COPY->KILL thing is not necessary anymore. This patch also changes a similar (but more benign case as the def and src are the same register) case in the VirtRegRewriter. Differential Revision: http://reviews.llvm.org/D10117 llvm-svn: 238588
* MIR Serialization: use correct line and column numbers for LLVM IR errors.Alex Lorenz2015-05-291-1/+40
| | | | | | | | | | | | | This commit translates the line and column numbers for LLVM IR errors from the numbers in the YAML block scalar to the numbers in the MIR file so that the MIRParser users can report LLVM IR errors with the correct line and column numbers. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10108 llvm-svn: 238576
* [WinEH] Emit EH tables for __CxxFrameHandler3 on 32-bit x86Reid Kleckner2015-05-294-137/+186
| | | | | | | | | | | | | Small (really small!) C++ exception handling examples work on 32-bit x86 now. This change disables the use of .seh_* directives in WinException when CFI is not in use. It also uses absolute symbol references in the tables instead of imagerel32 relocations. Also fixes a cache invalidation bug in MMI personality classification. llvm-svn: 238575
* This should have been a referenceMatthias Braun2015-05-291-1/+1
| | | | llvm-svn: 238540
* CodeGen: Use mop_iterator instead of MIOperands/ConstMIOperandsMatthias Braun2015-05-298-74/+80
| | | | | | | | | | | | | | | | | | | | | | | | MIOperands/ConstMIOperands are classes iterating over the MachineOperand of a MachineInstr, however MachineInstr::mop_iterator does the same thing. I assume these two iterators exist to have a uniform interface to iterate over the operands of a machine instruction bundle and a single machine instruction. However in practice I find it more confusing to have 2 different iterator classes, so this patch transforms (nearly all) the code to use mop_iterators. The only exception being MIOperands::anlayzePhysReg() and MIOperands::analyzeVirtReg() still needing an equivalent, I leave that as an exercise for the next patch. Differential Revision: http://reviews.llvm.org/D9932 This version is slightly modified from the proposed revision in that it introduces MachineInstr::getOperandNo to avoid the extra counting variable in the few loops that previously used MIOperands::getOperandNo. llvm-svn: 238539
* MachineFrameInfo: Simplify pristine register calculation.Matthias Braun2015-05-285-50/+9
| | | | | | | | | | | | | | | | | | | | | | | | | About pristine regsiters: Pristine registers "hold a value that is useless to the current function, but that must be preserved - they are callee saved registers that have not been saved." This concept saves compile time as it frees the prologue/epilogue inserter from adding every such register to every basic blocks live-in list. However the current code in getPristineRegs is formulated in a complicated way: Inside the function prologue and epilogue all callee saves are considered pristine, while in the rest of the code only the non-saved ones are considered pristine. This requires logic to differentiate between prologue/epilogue and the rest and in the presence of shrink-wrapping this even becomes complicated/expensive. It's also unnecessary because the prologue epilogue inserters already mark callee-save registers that are saved/restores properly in the respective blocks in the prologue/epilogue (see updateLiveness() in PrologueEpilogueInserter.cpp). So only declaring non-saved/restored callee saved registers as pristine just works. Differential Revision: http://reviews.llvm.org/D10101 llvm-svn: 238524
* Rename Win64Exception.(cpp|h) to WinException.(cpp|h)Reid Kleckner2015-05-284-18/+18
| | | | | | | This is in preparation for reusing this for 32-bit x86 EH table emission. Also updates the type name for consistency. NFC llvm-svn: 238521
* MIR Serialization: print and parse machine function names.Alex Lorenz2015-05-282-15/+81
| | | | | | | | | | | | | | | | | | This commit introduces a serializable structure called 'llvm::yaml::MachineFunction' that stores the machine function's name. This structure will mirror the machine function's state in the future. This commit prints machine functions as YAML documents containing a YAML mapping that stores the state of a machine function. This commit also parses the YAML documents that contain the machine functions. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D9841 llvm-svn: 238519
* [MachineCopyPropagation] Fix a bug with undef handling when the value is ↵Quentin Colombet2015-05-281-5/+9
| | | | | | | | actualy alive. Test case will follow. llvm-svn: 238518
* [WinEH] Start inserting state number stores for C++ EHReid Kleckner2015-05-282-371/+377
| | | | | | | | | | | | This moves all the state numbering code for C++ EH to WinEHPrepare so that we can call it from the X86 state numbering IR pass that runs before isel. Now we just call the same state numbering machinery and insert a bunch of stores. It also populates MachineModuleInfo with information about the current function. llvm-svn: 238514
* [SelectionDAG] Scalar shift amounts may require legalizationDavid Majnemer2015-05-281-3/+6
| | | | | | | | | The shift amount may be too small to cope with promoted left hand side, make sure to promote it as well. This fixes PR23664. llvm-svn: 238503
* AsmPrinter: Stop exposing underlying DIE children list, NFCDuncan P. N. Exon Smith2015-05-284-8/+5
| | | | | | | Update `DIE` API to hide the implementation of `DIE::Children` so we can swap it out. llvm-svn: 238468
* AsmPrinter: Rename begin_values() => values_begin(), NFCDuncan P. N. Exon Smith2015-05-281-2/+2
| | | | llvm-svn: 238456
* [AsmPrinter] Destroy allocated DIEAbbrevs on teardown.Benjamin Kramer2015-05-281-1/+4
| | | | | | | | | | DIEAbbrev contains a SmallVector that can leak for overly large abbrevs. They used to be owned by the DIE, but after the recent refactoring DWARFFile allocates its own abbrevs. Leak found by asan. llvm-svn: 238418
* AsmPrinter: Avoid a warning in NDEBUG, NFCDuncan P. N. Exon Smith2015-05-271-0/+1
| | | | | | | Should fix the -Werror release build: http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/11113 llvm-svn: 238375
* AsmPrinter: Return added DIE from DIE::addChild()Duncan P. N. Exon Smith2015-05-271-2/+1
| | | | | | | | | Change `DIE::addChild()` to return a reference to the just-added node, and update consumers to use it directly. An upcoming commit will abstract away (and eventually change) the underlying storage of `DIE::Children`. llvm-svn: 238372
* RegisterPressure: fix debug prints in case of physical registersFiona Glaser2015-05-271-2/+2
| | | | llvm-svn: 238371
* AsmPrinter: Stop exposing underlying DIEValue list, NFCDuncan P. N. Exon Smith2015-05-276-37/+26
| | | | | | | Change the `DIE` API to hide the implementation of the list of `DIEValue`s. llvm-svn: 238369
* AsmPrinter: Remove DIEHash::AttrEntry, NFCDuncan P. N. Exon Smith2015-05-272-62/+53
| | | | | | Remove "the most boring struct ever" (thanks to review by Eric). llvm-svn: 238366
* AsmPrinter: Store abbreviation data directly in DIE and DIEValueDuncan P. N. Exon Smith2015-05-277-65/+66
| | | | | | | | | | | | | | | | Stop storing a `DIEAbbrev` in `DIE`, since the data fits neatly inside the `DIEValue` list. Besides being a cleaner data structure (avoiding the parallel arrays), this gives us more freedom to rearrange the `DIEValue` list. This fixes the temporary memory regression from 845 MB up to 879 MB, and drops it further to 829 MB for a net memory decrease of around 1.9% (incremental decrease around 5.7%). (I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`; see r236629 for details.) llvm-svn: 238364
* Reapply "AsmPrinter: Change DIEValue to be stored by value"Duncan P. N. Exon Smith2015-05-279-178/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit r238350, effectively reapplying r238349 after fixing (all?) the problems, all somehow related to how I was using `AlignedArrayCharUnion<>` inside `DIEValue`: - MSVC can only handle `sizeof()` on types, not values. Change the assert. - GCC doesn't know the `is_trivially_copyable` type trait. Instead of asserting it, add destructors. - Call placement new even when constructing POD (i.e., the pointers). - Instead of copying the char buffer, copy the casted classes. I've left in a couple of `static_assert`s that I think both MSVC and GCC know how to handle. If the bots disagree with me, I'll remove them. - Check that the constructed type is either standard layout or a pointer. This protects against a programming error: we really want the "small" `DIEValue`s to be small and simple, so don't accidentally change them not to be. - Similarly, check that the size of the buffer is no bigger than a `uint64_t` or a pointer. (I thought checking against `sizeof(uint64_t)` would be good enough, but Chandler suggested that pointers might sometimes be bigger than that in the context of sanitizers.) I've also committed r238359 in the meantime, which introduces a DIEValue.def to simplify dispatching between the various types (thanks to a review comment by David Blaikie). Without that, this commit would be almost unintelligible. Here's the original commit message: -- Change `DIEValue` to be stored/passed/etc. by value, instead of reference. It's now a discriminated union, with a `Val` field storing the actual type. The classes that used to inherit from `DIEValue` no longer do. There are two categories of these: - Small values fit in a single pointer and are stored by value. - Large values require auxiliary storage, and are stored by reference. The only non-mechanical change is to tools/dsymutil/DwarfLinker.cpp. It was relying on `DIEInteger`s being passed around by reference, so I replaced that assumption with a `PatchLocation` type that stores a safe reference to where the `DIEInteger` lives instead. This commit causes a temporary regression in memory usage, since I've left merging `DIEAbbrevData` into `DIEValue` for a follow-up commit. I measured an increase from 845 MB to 879 MB, around 3.9%. The follow-up drops it lower than the starting point, and I've only recently brought the memory this low anyway, so I'm committing these changes separately to keep them incremental. (I also considered swapping the commits, but the other one first would cause a lot more code churn.) (I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`; see r236629 for details.) -- llvm-svn: 238362
* AsmPrinter: Introduce DIEValue.def, NFCDuncan P. N. Exon Smith2015-05-271-42/+12
| | | | | | | Use a .def macro file to iterate through the various subclasses of `DIEValue`. llvm-svn: 238359
* Revert "AsmPrinter: Change DIEValue to be stored by value"Duncan P. N. Exon Smith2015-05-279-118/+178
| | | | | | | | | This reverts commit r238349, since it caused some errors on bots: - std::is_trivially_copyable isn't available until GCC 5.0. - It was complaining about strict aliasing with my use of ArrayCharUnion. llvm-svn: 238350
* AsmPrinter: Change DIEValue to be stored by valueDuncan P. N. Exon Smith2015-05-279-178/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Change `DIEValue` to be stored/passed/etc. by value, instead of reference. It's now a discriminated union, with a `Val` field storing the actual type. The classes that used to inherit from `DIEValue` no longer do. There are two categories of these: - Small values fit in a single pointer and are stored by value. - Large values require auxiliary storage, and are stored by reference. The only non-mechanical change is to tools/dsymutil/DwarfLinker.cpp. It was relying on `DIEInteger`s being passed around by reference, so I replaced that assumption with a `PatchLocation` type that stores a safe reference to where the `DIEInteger` lives instead. This commit causes a temporary regression in memory usage, since I've left merging `DIEAbbrevData` into `DIEValue` for a follow-up commit. I measured an increase from 845 MB to 879 MB, around 3.9%. The follow-up drops it lower than the starting point, and I've only recently brought the memory this low anyway, so I'm committing these changes separately to keep them incremental. (I also considered swapping the commits, but the other one first would cause a lot more code churn.) (I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`; see r236629 for details.) llvm-svn: 238349
* Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format).Alex Lorenz2015-05-279-8/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit a 3rd attempt at comitting the initial MIR serialization patch. The first commit (r237708) was reverted in 237730. Then the second commit (r237954) was reverted in r238007, as the MIR library under CodeGen caused a circular dependency where the CodeGen library depended on MIR and MIR library depended on CodeGen. This commit has fixed the dependencies between CodeGen and MIR by reorganizing the MIR serialization code - the code that prints out MIR has been moved to CodeGen, and the MIR library has been renamed to MIRParser. Now the CodeGen library doesn't depend on the MIRParser library, thus the circular dependency no longer exists. --Original Commit Message-- MIR Serialization: print and parse LLVM IR using MIR format. This commit is the initial commit for the MIR serialization project. It creates a new library under CodeGen called 'MIR'. This new library adds a new machine function pass that prints out the LLVM IR using the MIR format. This pass is then added as a last pass when a 'stop-after' option is used in llc. The new library adds the initial functionality for parsing of MIR files as well. This commit also extends the llc tool so that it can recognize and parse MIR input files. Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames Differential Revision: http://reviews.llvm.org/D9616 llvm-svn: 238341
* SelectionDAG: Don't do libcall on div/rem if divrem is customJan Vesely2015-05-271-4/+28
| | | | | | | | | | | | v2: TargetLoweringBase:: -> TargetLowering:: Use Ops array v3: Explicitly use value 0 for ?DIV Remove redundant newline Differential revision: http://reviews.llvm.org/D7803 reviewer: ab llvm-svn: 238336
* Use operator<< instead of print in a few more places.Rafael Espindola2015-05-272-5/+2
| | | | llvm-svn: 238315
* [ShrinkWrap] Add a target hook to check whether or notQuentin Colombet2015-05-271-5/+10
| | | | | | | | | the target can handle a given basic block as prologue or epilogue. Related to <rdar://problem/20821487> llvm-svn: 238292
* MachineBasicBlock: Cleanup computeRegisterLiveness()Matthias Braun2015-05-271-16/+14
| | | | | | | | | - Clean documentation comment - Change the API to accept an iterator so you can actually pass MachineBasicBlock::end() now. - Add more "const". llvm-svn: 238288
* Remove NoFramePointerElim and NoFramePointerElimOverride from TargetOptions andAkira Hatanaka2015-05-261-27/+0
| | | | | | | | | | remove ExecutionEngine's dependence on CodeGen. NFC. This is a follow-up to r238080. Differential Revision: http://reviews.llvm.org/D9830 llvm-svn: 238244
* Use "auto &" in range-based for-loop and remove the extra braces.Adrian Prantl2015-05-261-2/+1
| | | | llvm-svn: 238243
* Fix a use-after-free in a DEBUG output.Adrian Prantl2015-05-261-4/+4
| | | | llvm-svn: 238242
* CodeGenPrepare: Don't match addressing modes through addrspacecastMatt Arsenault2015-05-261-1/+8
| | | | | | | This was resulting in the addrspacecast being removed and incorrectly replaced with a ptrtoint when sinking. llvm-svn: 238217
* Added promotion to EXTRACT_SUBVECTOR operand.Elena Demikhovsky2015-05-252-0/+12
| | | | | | | I encountered with this case in one of KNL tests for i1 vectors. v16i1 = EXTRACT_SUBVECTOR v32i1, x llvm-svn: 238130
* Reformat.NAKAMURA Takumi2015-05-251-2/+1
| | | | llvm-svn: 238126
* Prune CRLFs.NAKAMURA Takumi2015-05-251-55/+55
| | | | llvm-svn: 238125
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