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| author | Hans Wennborg <hans@hanshq.net> | 2015-06-04 15:55:00 +0000 |
|---|---|---|
| committer | Hans Wennborg <hans@hanshq.net> | 2015-06-04 15:55:00 +0000 |
| commit | d92291568586e13b1484cd720f6faf939f0b2623 (patch) | |
| tree | 99b8475e94455adc5fc6c8a9a16b2fa310101af3 /llvm/lib/CodeGen | |
| parent | c0aeadf92d8f8354f6e6f8f9a164f7bfbb106247 (diff) | |
| download | bcm5719-llvm-d92291568586e13b1484cd720f6faf939f0b2623.tar.gz bcm5719-llvm-d92291568586e13b1484cd720f6faf939f0b2623.zip | |
Switch lowering: fix assert in buildBitTests (PR23738)
When checking (High - Low + 1).sle(BitWidth), BitWidth would be truncated
to the size of the left-hand side. In the case of this PR, the left-hand
side was i4, so BitWidth=64 got truncated to 0 and the assert failed.
llvm-svn: 239048
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 6b366cc4af6..a07a024557c 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -7614,7 +7614,8 @@ bool SelectionDAGBuilder::buildBitTests(CaseClusterVector &Clusters, const int BitWidth = DAG.getTargetLoweringInfo().getPointerTy().getSizeInBits(); - assert((High - Low + 1).sle(BitWidth) && "Case range must fit in bit mask!"); + uint64_t Range = (High - Low).getLimitedValue(UINT64_MAX - 1) + 1; + assert(Range <= (uint64_t)BitWidth && "Case range must fit in bit mask!"); if (Low.isNonNegative() && High.slt(BitWidth)) { // Optimize the case where all the case values fit in a |
