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* Clean up the handling of two-address operands in RegScavenger.Jakob Stoklund Olesen2009-08-041-12/+3
| | | | | | This fixes PR4528. llvm-svn: 78107
* Don't give implicit machine operands special treatment in the register ↵Jakob Stoklund Olesen2009-08-041-5/+2
| | | | | | | | | scavenger. Imp-def is *not* allowed to redefine a live register. Imp-use is *not* allowed to use a dead register. llvm-svn: 78106
* rip out SectionEndDirectiveSuffix support, only uses byChris Lattner2009-08-041-4/+0
| | | | | | | the masm backend. If anyone cares about masm in the future, we'll have semantic sections it can hang off of. llvm-svn: 78096
* Don't tamper with <undef> operands in MachineInstr::addRegisterKilled.Jakob Stoklund Olesen2009-08-041-3/+1
| | | | | | | For an undef operand, MO.getReg() is meaningless and we should not use it. Undef operands should be skipped entirely. llvm-svn: 78095
* LowerSubregsInstructionPass::LowerExtract should not extend the live range ↵Jakob Stoklund Olesen2009-08-041-14/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of registers. When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the kill flag to the place where the sub-register is killed. This can accidentally overlap with the use of a sibling sub-register, and we have trouble. In the test case we have this code: Live Ins: %R0 %R1 %R2 %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0] %R1L<def> = EXTRACT_SUBREG %R1<kill>, 1 %R0L<def> = EXTRACT_SUBREG %R0<kill>, 1 %R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def> subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 subreg: eliminated! subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def> The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H: *** Bad machine code: Redefining a live physical register *** - function: f - basic block: 0x18358c0 (#0) - instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0] Register R2H was defined but already live. The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating it completely: subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill> Note that these IMPLICIT_DEF instructions survive to the asm output. It is necessary to fix the stack-color-with-reg test case because of that. llvm-svn: 78093
* Enforce stricter rules in machine code verifier.Jakob Stoklund Olesen2009-08-041-20/+15
| | | | | | | | | | | Implicit operands no longer get a free pass: Imp-use requires a live register and imp-def requires a dead register. There is also no special rule allowing redefinition of a sub-register when the super-register is live. The super register must have imp-kill+imp-def operands instead. llvm-svn: 78090
* Fix PR4528. This scavenger assertion is too strict. The two-address value isEvan Cheng2009-08-041-1/+2
| | | | | | | | | killed by another operand. There is probably a better fix. Either 1) scavenger can look at other operands, or 2) livevariables can be smarter about kill markers. Patches welcome. llvm-svn: 78072
* Propogate the Depth argument when callingDan Gohman2009-08-041-1/+2
| | | | | | | | | TLI.computeMaskedBitsForTargetNode from ComputeMaskedBits, since the former may call back into the latter. This fixes a major compile time problem on a testcase that happnened to hit this in a particularly bad way, PR4643. llvm-svn: 78023
* Update CMake files.Ted Kremenek2009-08-031-0/+1
| | | | llvm-svn: 78020
* eliminate CurrentSection, rename CurrentSection_ -> CurrentSection, make it ↵Chris Lattner2009-08-032-22/+15
| | | | | | | | private, eliminate IsInTextSection. llvm-svn: 78017
* Kill off SwitchToDataSection and SwitchToTextSection, woo.Chris Lattner2009-08-031-57/+3
| | | | llvm-svn: 78015
* Re-apply LiveInterval index dumping patch, with fixes suggested by BillDavid Greene2009-08-034-7/+36
| | | | | | and others. llvm-svn: 78003
* Fix Bug 4657: register scavenger asserts with subreg loweringJakob Stoklund Olesen2009-08-032-8/+33
| | | | | | | | | | | | | | | When LowerSubregsInstructionPass::LowerInsert eliminates an INSERT_SUBREG instriction because it is an identity copy, make sure that the same registers are alive before and after the elimination. When the super-register is marked <undef> this requires inserting an IMPLICIT_DEF instruction to make sure the super register is live. Fix a related bug where a kill flag on the inserted sub-register was not transferred properly. Finally, clear the undef flag in MachineInstr::addRegisterKilled. Undef implies dead and kill implies live, so they cant both be valid. llvm-svn: 77989
* make getObjFileLowering() return a non-const reference.Chris Lattner2009-08-031-1/+1
| | | | llvm-svn: 77984
* Revert 77974. It breaks 3 of the ARM tests.Bob Wilson2009-08-031-8/+0
| | | | llvm-svn: 77982
* make SwitchToSection accept null sections for now.Chris Lattner2009-08-031-3/+8
| | | | llvm-svn: 77976
* Allow targets to custom handle softening of results or operands before ↵Sanjiv Gupta2009-08-031-0/+8
| | | | | | trying the standard stuff. llvm-svn: 77974
* llvm_report_error already prints "LLVM ERROR:". So stop reporting errors ↵Benjamin Kramer2009-08-031-6/+5
| | | | | | like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:". llvm-svn: 77971
* Fix a coaelescer bug. If a copy val# is extended to eliminate a ↵Evan Cheng2009-08-031-1/+8
| | | | | | non-trivially coalesced copy, and the copy kills its source register. Trim the source register's live range to the last use if possible. This fixes up kill marker to make the scavenger happy. llvm-svn: 77967
* Fix some comments referring to std::cerr.Daniel Dunbar2009-08-031-2/+2
| | | | llvm-svn: 77931
* Fix issue in regscavenger when scavenging a callee-saved register that has ↵Jakob Stoklund Olesen2009-08-021-1/+8
| | | | | | not been spilled. llvm-svn: 77912
* Never add a kill flag to a constrained physical register in a two-addr ↵Jakob Stoklund Olesen2009-08-021-0/+3
| | | | | | instruction. llvm-svn: 77906
* Scavenger asserts.Jakob Stoklund Olesen2009-08-021-2/+11
| | | | | | | Allow imp-def and imp-use of anything in the scavenger asserts, just like the machine code verifier. Allow redefinition of a sub-register of a live register. llvm-svn: 77904
* Avoid forming a SELECT_CC in a type that the target doesn'tDan Gohman2009-08-021-1/+2
| | | | | | | | | | | | | | | | | | | support. This isn't immediately interesting, because Legalize ends up lowering SELECT_CC if the target doesn't support it, but this simplifies the process. Also, if the SELECT_CC would be expanded in Legalize, it can potentially end up with two copies of the condition expression. By leaving it as SELECT+SETCC, the SELECT can be expanded into two SELECTs that use a single SETCC. The two comparisons are usually CSE'd, but depending on when various expressions get legalized, the comparison expression could involve calls to library functions, such that the comparison expression may not be able to be CSE'd. This will be needed by a future patch. llvm-svn: 77896
* Handle <undef> flag in machine code verifier.Jakob Stoklund Olesen2009-08-021-1/+2
| | | | | | Use of an <undef> register is treated like an <imp-use>. It is not an error to use a dead <undef> register. llvm-svn: 77890
* move dwarf debug info section selection stuff from TAI toChris Lattner2009-08-021-24/+26
| | | | | | TLOF, unifying all the dwarf targets at the same time. llvm-svn: 77889
* convert EHFrameSection to be managed by TLOF instead of TAI.Chris Lattner2009-08-021-2/+2
| | | | llvm-svn: 77888
* remove the dead ELFTargetAsmInfo.h/cpp file. TargetAsmInfoChris Lattner2009-08-021-1/+1
| | | | | | defaults to being ELF. llvm-svn: 77866
* Fix some fixme's in #if 0'd code by making it dependent on the structuralChris Lattner2009-08-021-29/+34
| | | | | | | behavior of the LSDA section instead of on some random target hook that needs to be kept in synch with other points of truth. llvm-svn: 77855
* move getDwarfExceptionSection from TAI to TLOF and rename it to Chris Lattner2009-08-021-5/+4
| | | | | | | | | | | getLSDASection() to be more specific. This makes it pretty obvious that the ELF LSDA section is being specified wrong in PIC mode. We're probably getting a lot of startup-time relocations to a readonly page, which is expensive and bad. Someone who cares about ELF C++ should investigate this. llvm-svn: 77847
* convert ctors/dtors section to be in TLOF instead ofChris Lattner2009-08-021-2/+2
| | | | | | TAI. llvm-svn: 77842
* (re)introduce new simpler apis for creation sectionkinds.Chris Lattner2009-08-012-16/+14
| | | | llvm-svn: 77834
* Remove "JumpTableDataSection" from TAI, instead, have AsmPrinterChris Lattner2009-08-012-13/+17
| | | | | | | | | | | | compute it based on what it knows. As part of this, rename getSectionForMergeableConstant to getSectionForConstant because it works for non-mergable constants also. The only functionality change from this is that Xcore will start dropping its jump tables into readonly section instead of data section in -static mode. This should be fine as the linker resolves the relocations. If this is a problem, let me know and we'll come up with another solution. llvm-svn: 77833
* loweringinfo is always non-null.Chris Lattner2009-08-011-1/+1
| | | | llvm-svn: 77821
* fix a problem Eli noticed where we would compile the attached ptrtointChris Lattner2009-08-011-13/+13
| | | | | | | | | | | | | | | to: .quad X even on a 32-bit system, where X is not 64-bits. There isn't much that we can do here, so we just print: .quad ((X) & 4294967295) instead. llvm-svn: 77818
* Change SectionKind to be a property that is true of a *section*, itChris Lattner2009-08-012-15/+14
| | | | | | | | | | | | | | | | | | should have no state that is specific to particular globals in the section. In this case, it means the removal of the "isWeak" and "ExplicitSection" bits. MCSection uses the new form of SectionKind. To handle isWeak, I introduced a new SectionInfo class, which is SectionKind + isWeak, and it is used by the part of the code generator that does classification of a specific global. The ExplicitSection disappears. It is moved onto MCSection as a new "IsDirective" bit. Since the Name of a section is either a section or directive, it makes sense to keep this bit in MCSection. Ultimately the creator of MCSection should canonicalize (e.g.) .text to whatever the actual section is. llvm-svn: 77803
* Print the target flags as an int instead of a char, as they aren'tDan Gohman2009-08-011-4/+4
| | | | | | actually characters. llvm-svn: 77794
* Give MachineFunctionAnalysis a destructor so it can verify thatDan Gohman2009-08-011-0/+4
| | | | | | that it released its allocated memory. llvm-svn: 77775
* Delete a redundant variable.Dan Gohman2009-08-011-1/+0
| | | | llvm-svn: 77774
* Minor code simplifications.Dan Gohman2009-08-011-8/+8
| | | | llvm-svn: 77769
* SelectionDAGISel no longer needs to check hasAvailableExternallyLinkage,Dan Gohman2009-08-011-5/+0
| | | | | | | as it is now a MachineFunctionPass, and MachineFunctionPass now handles this. llvm-svn: 77760
* Make UnreachableMachineBlockElim preserve MachineDominatorTree andDan Gohman2009-08-011-0/+15
| | | | | | | | | MachineLoopInfo. llc now runs MachineLoopInfo and MachineDominatorTree only twice, instead of three times. llvm-svn: 77759
* Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman2009-07-3117-14/+31
| | | | llvm-svn: 77754
* SelectionDAGISel does not "preserve all", since it makes lots of changesDan Gohman2009-07-311-1/+3
| | | | | | to the MachineFunction. llvm-svn: 77753
* Use a range insert instead of an explicit loop.Dan Gohman2009-07-311-2/+1
| | | | llvm-svn: 77752
* Allow target intrinsics that return multiple values, i.e., struct types,Bob Wilson2009-07-311-15/+9
| | | | | | | | | | | | | | | | | | | | | | | | in SelectionDAGLowering::visitTargetIntrinsic. This removes a bit of special-case code for vector types. After staring at it for a while, I managed to convince myself that it is not necessary. The only case where TLI.getValueType() differs from MVT::getMVT is for iPTR, so this code could potentially make a difference for a vector of pointers. But, it looks like that is not supported. Calling TLI.getValueType() on a vector of pointers leads to the following sequence of calls: TargetLowering::getValueType MVT::getMVT MVT::getVectorVT(iPTR, num elements) MVT::getExtendedVectorVT MVT::getTypeForMVT for iPTR assertion fails "Type is not extended!" So, unless I'm really missing something, this bit of code is irrelevant to the current version of LLVM, which is consistent with the fact that I don't see this code in other similar places. llvm-svn: 77747
* add some comments on how this is *supposed* to work. We don'tChris Lattner2009-07-311-0/+27
| | | | | | | need the PreferredEHDataFormat hook, but I have yet-more refactoring to do before I can zap it. llvm-svn: 77742
* rearrange a conditional. Even if this weren't #if 0'd out, this wouldChris Lattner2009-07-311-4/+5
| | | | | | have no functionality change. llvm-svn: 77741
* Simplify operand padding by keying off tabs in the asm stream. IfDavid Greene2009-07-311-1/+21
| | | | | | | | | | | | padding is disabled, tabs get replaced by spaces except in the case of the first operand, where the tab is output to line up the operands after the mnemonics. Add some better comments and eliminate redundant code. Fix some testcases to not assume tabs. llvm-svn: 77740
* PreferredEHDataFormat is always call with data and global, but this wholeChris Lattner2009-07-311-1/+1
| | | | | | | thing is #if0'd out anyway. Just simplify the code by reducing the interface. Not deleting this is essential for Bill's continuing happiness. llvm-svn: 77736
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