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* Use GetUnderlyingObjects in mischedHal Finkel2012-12-101-92/+143
| | | | | | | | | | | | | | | | misched used GetUnderlyingObject in order to break false load/store dependencies, and the -enable-aa-sched-mi feature similarly relied on GetUnderlyingObject in order to ensure it is safe to use the aliasing analysis. Unfortunately, GetUnderlyingObject does not recurse through phi nodes, and so (especially due to LSR) all of these mechanisms failed for induction-variable-dependent loads and stores inside loops. This change replaces uses of GetUnderlyingObject with GetUnderlyingObjects (which will recurse through phi and select instructions) in misched. Andy reviewed, tested and simplified this patch; Thanks! llvm-svn: 169744
* Teach DAG combine to handle vector add/sub with vectors of all 0s.Craig Topper2012-12-101-0/+10
| | | | llvm-svn: 169727
* Remove extra blank line.Craig Topper2012-12-091-1/+0
| | | | llvm-svn: 169692
* Teach DAG combine to handle vector logical operations with vectors of all 1s ↵Craig Topper2012-12-081-0/+30
| | | | | | or all 0s. These cases can show up when vectors are split for legalizing. Fix some tests that were dependent on these cases not being combined. llvm-svn: 169684
* Add higher-level API for dealing with bundled MachineInstrs.Jakob Stoklund Olesen2012-12-071-0/+32
| | | | | | | | | | | | | | | | | | | | | This is still a work in progress. The purpose is to make bundling and unbundling operations explicit, and to catch errors where bundles are broken or created inadvertently. The old IsInsideBundle flag is replaced by two MI flags: BundledPred which has the same meaning as IsInsideBundle, and BundledSucc which is set on instructions that are bundled with a successor. Having two flags provdes redundancy to detect when a bundle is inadvertently torn by a splice() or insert(), and it makes it possible to write bundle iterators that don't need to peek at adjacent instructions. The new flags can't be manipulated directly (once setIsInsideBundle is gone). Instead there are MI functions to make and break bundle bonds. The setIsInsideBundle function will be removed in a future commit. It should be replaced by bundleWithPred(). llvm-svn: 169583
* fixed valgrind issues of prior commit, this change applies r169456 changes ↵Pedro Artigas2012-12-061-1/+6
| | | | | | | | | | | | back to the tree with fixes. on darwin no valgrind issues exist in the tests that used to fail. original change description: change MCContext to work on the doInitialization/doFinalization model reviewed by Evan Cheng <evan.cheng@apple.com> llvm-svn: 169553
* Replace r169459 with something safer. Rather than having computeMaskedBits toEvan Cheng2012-12-063-28/+10
| | | | | | | | | | understand target implementation of any_extend / extload, just generate zero_extend in place of any_extend for liveouts when the target knows the zero_extend will be implicit (e.g. ARM ldrb / ldrh) or folded (e.g. x86 movz). rdar://12771555 llvm-svn: 169536
* Fix a bug in the code that merges consecutive stores. Previously we did notNadav Rotem2012-12-061-10/+14
| | | | | | | check if loads that happen in between stores alias with the first store in the chain, only with the second store onwards. llvm-svn: 169516
* s/getLowerBoundDefault/getDefaultLowerBound/ for consistency. Also put the ↵Bill Wendling2012-12-062-5/+7
| | | | | | more natural check first in the if-then statement. llvm-svn: 169486
* Handle non-default array bounds.Bill Wendling2012-12-062-14/+59
| | | | | | | | | Some languages, e.g. Ada and Pascal, allow you to specify that the array bounds are different from the default (1 in these cases). If we have a lower bound that's non-default, then we emit the lower bound. We also calculate the correct upper bound in those cases. llvm-svn: 169484
* Revert r169456, "change MCContext to work on the ↵NAKAMURA Takumi2012-12-061-5/+0
| | | | | | | | doInitialization/doFinalization model" It broke many builders. llvm-svn: 169462
* Let targets provide hooks that compute known zero and ones for any_extendEvan Cheng2012-12-062-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and extload's. If they are implemented as zero-extend, or implicitly zero-extend, then this can enable more demanded bits optimizations. e.g. define void @foo(i16* %ptr, i32 %a) nounwind { entry: %tmp1 = icmp ult i32 %a, 100 br i1 %tmp1, label %bb1, label %bb2 bb1: %tmp2 = load i16* %ptr, align 2 br label %bb2 bb2: %tmp3 = phi i16 [ 0, %entry ], [ %tmp2, %bb1 ] %cmp = icmp ult i16 %tmp3, 24 br i1 %cmp, label %bb3, label %exit bb3: call void @bar() nounwind br label %exit exit: ret void } This compiles to the followings before: push {lr} mov r2, #0 cmp r1, #99 bhi LBB0_2 @ BB#1: @ %bb1 ldrh r2, [r0] LBB0_2: @ %bb2 uxth r0, r2 cmp r0, #23 bhi LBB0_4 @ BB#3: @ %bb3 bl _bar LBB0_4: @ %exit pop {lr} bx lr The uxth is not needed since ldrh implicitly zero-extend the high bits. With this change it's eliminated. rdar://12771555 llvm-svn: 169459
* change MCContext to work on the doInitialization/doFinalization modelPedro Artigas2012-12-061-0/+5
| | | | | | reviewed by Evan Cheng <evan.cheng@apple.com> llvm-svn: 169456
* RegPressureTracker::dump(): Remove unnecessary argument.Andrew Trick2012-12-051-1/+1
| | | | llvm-svn: 169443
* RegisterPressureTracker: fix findUseBetween to handle DebugValueAndrew Trick2012-12-051-0/+2
| | | | llvm-svn: 169427
* RegisterPressureTracker: unify virtual registers and physical regunits.Andrew Trick2012-12-051-241/+179
| | | | | | Now that live register units are tracked individually, the code can be simplified. llvm-svn: 169426
* RegisterPresssureTracker: Track live physical register by unit.Andrew Trick2012-12-051-94/+87
| | | | | | | | This is much simpler to reason about, more efficient, and fixes some corner cases involving implicit super-register defs. Fixed rdar://12797931. llvm-svn: 169425
* Remove unused MachineInstr constructors.Jakob Stoklund Olesen2012-12-051-27/+0
| | | | | | | | A MachineInstr can only ever be constructed by CreateMachineInstr() and CloneMachineInstr(), and those factories don't use the removed constructors. llvm-svn: 169395
* - Added calls to doInitialization/doFinalization to immutable passesPedro Artigas2012-12-051-10/+23
| | | | | | | | | - fixed ordering of calls to doFinalization to be the reverse of the pass run order due to potential dependencies - fixed machine module info to operate in the doInitialization/doFinalization model, also fixes some FIXMEs reviewed by Evan Cheng <evan.cheng@apple.com> llvm-svn: 169391
* Added RegisterPressureTracker::dump() for debugging.Andrew Trick2012-12-051-5/+16
| | | | llvm-svn: 169359
* Speed up the AllocationOrder class a bit.Jakob Stoklund Olesen2012-12-043-25/+19
| | | | | | | Allow the central functions to be inlined, and use the argumentless isHint() function when possible. llvm-svn: 169319
* Comment change made in r169304 as requested by Eric Christopher.David Blaikie2012-12-041-0/+2
| | | | llvm-svn: 169315
* Use the 'count' attribute to calculate the upper bound of an array.Bill Wendling2012-12-041-13/+14
| | | | | | | | | The count attribute is more accurate with regards to the size of an array. It also obviates the upper bound attribute in the subrange. We can also better handle an unbound array by setting the count to -1 instead of the lower bound to 1 and upper bound to 0. llvm-svn: 169312
* Reapply r160148 (reverted in r163570) fixing spurious breakpoints in modern GDBDavid Blaikie2012-12-041-1/+1
| | | | | | | | | | | | | | | | | This reapplies the fix for PR13303 now with more justification. Based on my execution of the GDB 7.5 test suite this results in: expected passes: 16101 -> 20890 (+30%) unexpected failures: 4826 -> 637 (-77%) There are 23 checks that used to pass and now fail. They are all in gdb.reverse. Investigating a few looks like they were accidentally passing due to extra breakpoints being set by this bug. They're generally due to the difference in end location between gcc and clang, the test suite is trying to set breakpoints on the closing '}' that clang doesn't associate with any instructions. llvm-svn: 169304
* Sort includes for all of the .h files under the 'lib' tree. These wereChandler Carruth2012-12-0413-28/+28
| | | | | | | | | | missed in the first pass because the script didn't yet handle include guards. Note that the script is now able to handle all of these headers without manual edits. =] llvm-svn: 169224
* Add a 'count' field to the DWARF subrange.Bill Wendling2012-12-041-1/+3
| | | | | | | | | The count field is necessary because there isn't a difference between the 'lo' and 'hi' attributes for a one-element array and a zero-element array. When the count is '0', we know that this is a zero-element array. When it's >=1, then it's a normal constant sized array. When it's -1, then the array is unbounded. llvm-svn: 169218
* Simplify code. No functionality change.Jakub Staszak2012-12-041-3/+1
| | | | llvm-svn: 169198
* Stack Alignment: when creating stack objects in MachineFrameInfo, make sureManman Ren2012-12-041-1/+24
| | | | | | | | | | | | | | | | the alignment is clamped to TargetFrameLowering.getStackAlignment if the target does not support stack realignment or the option "realign-stack" is off. This will cause miscompile if the address is treated as aligned and add is replaced with or in DAGCombine. Added a bool StackRealignable to TargetFrameLowering to check whether stack realignment is implemented for the target. Also added a bool RealignOption to MachineFrameInfo to check whether the option "realign-stack" is on. rdar://12713765 llvm-svn: 169197
* Use dyn_cast instead of isa and cast. No functionality change.Jakub Staszak2012-12-041-4/+4
| | | | llvm-svn: 169196
* Remove VirtRegMap::getRegAllocPref().Jakob Stoklund Olesen2012-12-041-11/+0
| | | | | | | Now that there can be multiple hint registers from targets, it doesn't make sense to have a function that returns 'the' preferred register. llvm-svn: 169190
* Use MRI::getSimpleHint() instead of getRegAllocPref() in remaining cases.Jakob Stoklund Olesen2012-12-042-1/+10
| | | | | | | | | Targets can provide multiple hints now, so getRegAllocPref() doesn't make sense any longer because it only returns one preferred register. Replace it with getSimpleHint() in the remaining heuristics. This function only llvm-svn: 169188
* Stack Alignment: move functions from header file MachineFrameInfo.h.Manman Ren2012-12-041-0/+44
| | | | | | | | | No functional change for this commit. The follow-up patch will add more stuff to these functions. rdar://12713765 llvm-svn: 169186
* Add VirtRegMap::hasKnownPreference().Jakob Stoklund Olesen2012-12-032-1/+10
| | | | | | | | Virtual registers with a known preferred register are prioritized by RAGreedy. This function makes the condition explicit without depending on getRegAllocPref(). llvm-svn: 169179
* Use the new getRegAllocationHints() hook from AllocationOrder.Jakob Stoklund Olesen2012-12-032-79/+49
| | | | | | | This simplifies the hinting code quite a bit while making the targets easier to write at the same time. llvm-svn: 169173
* moves doInitialization and doFinalization to the Pass class and removes some ↵Pedro Artigas2012-12-031-15/+0
| | | | | | | | unreachable code in MachineModuleInfo reviewed by Evan Cheng <evan.cheng@apple.com> llvm-svn: 169164
* Add a new hook for providing register allocator hints more flexibly.Jakob Stoklund Olesen2012-12-031-0/+38
| | | | | | | | | | | | | | | | | | The TargetRegisterInfo::getRegAllocationHints() function is going to replace the existing mechanisms for providing target-dependent hints to the register allocator: ResolveRegAllocHint() and getRawAllocationOrder(). The new hook is more flexible because it allows the target to provide multiple preferred candidate registers for each virtual register, and it is easier to use because targets are not required to return a reference to a constant array like getRawAllocationOrder(). An optional VirtRegMap argument can be used to provide target-dependent hints that depend on the provisional assignments of other virtual registers. llvm-svn: 169154
* Fix PR12942: Allow two CUs to be generated from the same source file.Eli Bendersky2012-12-034-24/+33
| | | | | | Thanks Eric for the review. llvm-svn: 169142
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-03113-689/+682
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Allow merging multiple store sequences on the same chain.Nadav Rotem2012-12-021-2/+15
| | | | llvm-svn: 169111
* misched: Fix RegisterPressureTracker handling of DebugVals.Andrew Trick2012-12-013-19/+25
| | | | | | | Assertion failed: (TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker"). rdar://12790302. llvm-svn: 169072
* misched: Fix the DAG builder to handle an undef operand at ExitSU.Andrew Trick2012-12-011-1/+2
| | | | | | | Assertion failed: (VNI && "No value to read by operand") rdar://12790267. llvm-svn: 169071
* misched: Fix LiveInterval update to better handle DebugVal.Andrew Trick2012-12-011-1/+5
| | | | | | | Assertion failed: (itr != mi2iMap.end() && "Instruction not found in maps.") rdar://12777252. llvm-svn: 169070
* misched: fix RegionBegin when DebugValues get shuffled to the top.Andrew Trick2012-12-011-0/+2
| | | | | | | | assert (RemainingInstrs == 0 && "Instruction count mismatch!") rdar://12776937. llvm-svn: 169069
* Simplify REG_SEQUENCE lowering.Jakob Stoklund Olesen2012-12-011-187/+69
| | | | | | | | | | | The TwoAddressInstructionPass takes the machine code out of SSA form by expanding REG_SEQUENCE instructions into copies. It is no longer necessary to rewrite the registers used by a REG_SEQUENCE instruction because the new coalescer algorithm can do it now. REG_SEQUENCE is just converted to a sequence of sub-register copies now. llvm-svn: 169067
* Add some first skeleton work for the DWARF5 Fission proposal. EmitEric Christopher2012-11-302-8/+119
| | | | | | | | | part of the compile unit CU and start separating out information into the various sections that will be pulled out later. WIP. llvm-svn: 169061
* Convert COPY instructions into KILLs if they have implicit defs.Jakob Stoklund Olesen2012-11-301-3/+17
| | | | | | | | | | | MachineCopyPropagation doesn't understand super-register liveness well enough to be able to remove implicit defs of super-registers. This fixes a problem in ARM/2012-01-26-CopyPropKills.ll that is exposed by an future TwoAddressInstructionPass change. The KILL instructions are removed before the machine code is emitted. llvm-svn: 169060
* Replace r168930 with a more reasonable patch.Bill Wendling2012-11-302-3/+9
| | | | | | | | | | | The original patch removed a bunch of code that the SjLjEHPrepare pass placed into the entry block if all of the landing pads were removed during the CodeGenPrepare class. The more natural way of doing things is to run the CGP *before* we run the SjLjEHPrepare pass. Make it so! llvm-svn: 169044
* More comment.Eric Christopher2012-11-291-0/+2
| | | | llvm-svn: 168952
* Cleanup recent addition of DAGTypeLegalizer::SplitVecOp_VSELECTJustin Holewinski2012-11-291-35/+31
| | | | llvm-svn: 168932
* misched: Recompute priority queue when DFSResults are updated.Benjamin Kramer2012-11-291-0/+2
| | | | | | | | This was found by MSVC10's STL debug mode on a test from the test suite. Sadly std::is_heap isn't standard so there is no way to assert this without writing our own heap verify, which looks like overkill to me. llvm-svn: 168885
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