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* Take allocation hints from copy instructions to/from physregs.Jakob Stoklund Olesen2010-05-131-18/+68
| | | | | | This causes way more identity copies to be generated, ripe for coalescing. llvm-svn: 103686
* More asserts around physreg usesJakob Stoklund Olesen2010-05-131-1/+11
| | | | llvm-svn: 103685
* If REG_SEQUENCE source is livein, copy it first. Also, update livevariables ↵Evan Cheng2010-05-131-4/+23
| | | | | | information when a copy is introduced. llvm-svn: 103680
* Do not attempt copy coalescing if the source and dest sub-register indices ↵Evan Cheng2010-05-121-2/+4
| | | | | | do not match. llvm-svn: 103679
* Make sure to add kill flags to the last use of a virtreg when it is redefined.Jakob Stoklund Olesen2010-05-121-12/+22
| | | | | | The X86 floating point stack pass and others depend on good kill flags. llvm-svn: 103635
* Remove unused variable. Tweak a comment while there.Duncan Sands2010-05-121-2/+2
| | | | llvm-svn: 103586
* updated support for the COFF .linkonceNathan Jeffords2010-05-121-7/+1
| | | | | | Now, the .linkonce directive is emitted as part of MCSectionCOFF::PrintSwitchToSection instead of AsmPrinter::EmitLinkage since it is an attribute of the section the symbol was placed into not the symbol itself. llvm-svn: 103568
* Teach local regalloc about virtual registers with sub-indices.Evan Cheng2010-05-121-9/+37
| | | | llvm-svn: 103539
* Code clean up.Evan Cheng2010-05-121-1/+2
| | | | llvm-svn: 103538
* Avoid scoping issues, fix buildbotsJakob Stoklund Olesen2010-05-121-20/+21
| | | | llvm-svn: 103530
* Add initial kill flag support to FastISel.Dan Gohman2010-05-111-60/+136
| | | | llvm-svn: 103529
* Make Clang happy.Daniel Dunbar2010-05-111-3/+3
| | | | llvm-svn: 103528
* Store the Dirty bit in the LiveReg structure instead of a bit vector.Jakob Stoklund Olesen2010-05-111-34/+28
| | | | llvm-svn: 103522
* Keep track of the last place a live virtreg was used.Jakob Stoklund Olesen2010-05-111-72/+118
| | | | | | | This allows us to add accurate kill markers, something the scavenger likes. Add some more tests from ARM that needed this. llvm-svn: 103521
* Don't set kill flags on uses of CopyFromReg nodes. InstrEmitter doesn'tDan Gohman2010-05-111-9/+16
| | | | | | | create separate virtual registers for CopyFromReg values, so uses of them don't necessarily kill the value. llvm-svn: 103519
* Silence warningJakob Stoklund Olesen2010-05-111-1/+1
| | | | llvm-svn: 103508
* Simplify the tracking of used physregs to a bulk bitor followed by a transitiveJakob Stoklund Olesen2010-05-112-4/+18
| | | | | | | | closure after allocating all blocks. Add a few more test cases for -regalloc=fast. llvm-svn: 103500
* I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename itDuncan Sands2010-05-113-4/+4
| | | | | | | to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is the opposite, for future use by dragonegg. llvm-svn: 103495
* Trim #includes and forward declarations.Dan Gohman2010-05-112-2/+0
| | | | llvm-svn: 103489
* Mostly rewrite RegAllocFast.Jakob Stoklund Olesen2010-05-111-700/+469
| | | | | | | | | | | | | | | | | | Sorry for the big change. The path leading up to this patch had some TableGen changes that I didn't want to commit before I knew they were useful. They weren't, and this version does not need them. The fast register allocator now does no liveness calculations. Instead it relies on kill flags provided by isel. (Currently those kill flags are also ignored due to isel bugs). The allocation algorithm is supposed to work with any subset of valid kill flags. More kill flags simply means fewer spills inserted. Registers are allocated from a working set that contains no aliases. That means most allocations can be done directly without expensive alias checks. When the working set runs out of registers we do the full alias check to find new free registers. llvm-svn: 103488
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-112-5/+9
| | | | | | | | Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. llvm-svn: 103481
* Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!Douglas Gregor2010-05-114-4/+16
| | | | llvm-svn: 103457
* It's not safe eliminate copies where src and dst have different sub-register ↵Evan Cheng2010-05-114-10/+15
| | | | | | indices. llvm-svn: 103450
* Ensure REG_SEQUENCE source operands are unique.Evan Cheng2010-05-111-0/+19
| | | | llvm-svn: 103449
* Indentation.Evan Cheng2010-05-101-4/+4
| | | | llvm-svn: 103441
* Enable multiple Compile Units in one module.Devang Patel2010-05-102-162/+228
| | | | | | This means now 'llvm-ld a.bc b.bc' will preserve debug info appropriately. llvm-svn: 103439
* It's not safe to propagate implicit_def that defines part of a register.Evan Cheng2010-05-101-0/+2
| | | | llvm-svn: 103436
* Clear RegSequences vector after eliminating REG_SEQUENCE instructions.Evan Cheng2010-05-101-0/+1
| | | | llvm-svn: 103435
* Be careful with operand promotion. For a binary operation, the source ↵Evan Cheng2010-05-101-4/+10
| | | | | | operands may be the same. PR7018. rdar://7939869. llvm-svn: 103419
* Re-defined valno is always valno even for partial re-def's.Evan Cheng2010-05-101-2/+1
| | | | llvm-svn: 103410
* Fix PR7096. When a block containing multiple defs is tail duplicated, theBob Wilson2010-05-101-1/+1
| | | | | | | SSAUpdater for the value from the first def may see uses of undefined values, because the later defs will not have been updated yet. llvm-svn: 103407
* Add an assertion to catch attempts to access off the end of the array.Duncan Sands2010-05-101-0/+2
| | | | | | Based on a patch by Javier Martinez. llvm-svn: 103391
* Instead of just verifying compile unit, verify entire type, variable, ↵Devang Patel2010-05-071-11/+10
| | | | | | namespace etc.. llvm-svn: 103327
* Remove DIGlobal.Devang Patel2010-05-072-2/+2
| | | | llvm-svn: 103325
* SDDbgValues are apparently not being legalized. Fix a symptom of the problem,Dan Gohman2010-05-071-1/+7
| | | | | | | and not the real problem itself, by dropping debug info for i128 values. rdar://7958162. llvm-svn: 103310
* Verify variable directly.Devang Patel2010-05-072-3/+3
| | | | llvm-svn: 103305
* add COFF support for COMDAT sections, patch by Nathan Jeffords!Chris Lattner2010-05-071-4/+16
| | | | llvm-svn: 103304
* Verify entire type descriptor not just tag.Devang Patel2010-05-071-2/+2
| | | | llvm-svn: 103303
* Fix PR 7087, and probably other things, by extendingDale Johannesen2010-05-071-1/+11
| | | | | | | | | getConstantFP to accept the two supported long double target types. This was not the original intent, but there are other places that assume this works and it's easy enough to do. llvm-svn: 103299
* Wrap const MDNode * inside DIDescriptor.Devang Patel2010-05-072-55/+55
| | | | llvm-svn: 103295
* Avoid DIDescriptor::getNode(). Use overloaded operators instead.Devang Patel2010-05-072-66/+66
| | | | llvm-svn: 103272
* switch MCSectionCOFF from a syntactic to semantic representation,Chris Lattner2010-05-071-54/+115
| | | | | | patch by Peter Housel! llvm-svn: 103267
* Revert r103133 and add testcase from PR7066.Nick Lewycky2010-05-071-12/+2
| | | | llvm-svn: 103233
* Transfer debug location information from PHI nodes to resultingDan Gohman2010-05-071-0/+8
| | | | | | lowered copies. llvm-svn: 103228
* Print debug information for SDNodes.Dan Gohman2010-05-071-0/+16
| | | | llvm-svn: 103227
* Disable the new unknown-location code for now. It causes a majorDan Gohman2010-05-071-14/+20
| | | | | | | increase in the debug line info section, and it's causing regressions in a gdb testsuite. llvm-svn: 103226
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-0612-40/+59
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-067-25/+32
| | | | llvm-svn: 103193
* 80 col violation.Evan Cheng2010-05-061-2/+2
| | | | llvm-svn: 103185
* Fixes a coalescer bug that caused llc to crash on 2009-11-30-LiveVariablesBug.llEvan Cheng2010-05-061-4/+16
| | | | | | | | | | | with the fix in 103157. %reg1039:1<def> = VMOVS %S1<kill>, pred:14, pred:%reg0 is not coalescable since none of the super-registers of S1 are in reg1039's register class: DPR_VFP2. But it is still a legal copy instruction so it should not assert. llvm-svn: 103170
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