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authorEvan Cheng <evan.cheng@apple.com>2010-05-12 23:59:42 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-05-12 23:59:42 +0000
commitecf016601212fb655947def982a50f102315dd01 (patch)
tree0254e0343b96b1ba063f2de6649b79fa064bca8f /llvm/lib/CodeGen
parentc5ffabc94fdfbf838feefce6f309008ed85f4f8f (diff)
downloadbcm5719-llvm-ecf016601212fb655947def982a50f102315dd01.tar.gz
bcm5719-llvm-ecf016601212fb655947def982a50f102315dd01.zip
Do not attempt copy coalescing if the source and dest sub-register indices do not match.
llvm-svn: 103679
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/RegAllocLocal.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/RegAllocLocal.cpp b/llvm/lib/CodeGen/RegAllocLocal.cpp
index 0a14e292372..63725598248 100644
--- a/llvm/lib/CodeGen/RegAllocLocal.cpp
+++ b/llvm/lib/CodeGen/RegAllocLocal.cpp
@@ -846,7 +846,8 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
unsigned SrcCopyReg, DstCopyReg, SrcCopySubReg, DstCopySubReg;
unsigned SrcCopyPhysReg = 0U;
bool isCopy = TII->isMoveInstr(*MI, SrcCopyReg, DstCopyReg,
- SrcCopySubReg, DstCopySubReg);
+ SrcCopySubReg, DstCopySubReg) &&
+ SrcCopySubReg == DstCopySubReg;
if (isCopy && TargetRegisterInfo::isVirtualRegister(SrcCopyReg))
SrcCopyPhysReg = getVirt2PhysRegMapSlot(SrcCopyReg);
@@ -1154,7 +1155,8 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
// the register scavenger. See pr4100.)
if (TII->isMoveInstr(*MI, SrcCopyReg, DstCopyReg,
SrcCopySubReg, DstCopySubReg) &&
- SrcCopyReg == DstCopyReg && DeadDefs.empty())
+ SrcCopyReg == DstCopyReg && SrcCopySubReg == DstCopySubReg &&
+ DeadDefs.empty())
MBB.erase(MI);
}
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