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* add a new method, play around with some code.Chris Lattner2005-10-201-10/+56
| | | | | | | | Fix a *bug* in the extendIntervalEndTo method. In particular, if adding [2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30). Which is not the most smart thing to do. Now produce [0:30). llvm-svn: 23841
* Refactor some code, pulling it out into a function. No functionality change.Chris Lattner2005-10-201-15/+26
| | | | llvm-svn: 23839
* Move the target constant divide optimization up into the dag combiner, soNate Begeman2005-10-201-0/+263
| | | | | | | that the nodes can be folded with other nodes, and we can not duplicate code in every backend. Alpha will probably want this too. llvm-svn: 23835
* Teach Legalize how to do something with EXTRACT_ELEMENT when the type ofNate Begeman2005-10-191-7/+30
| | | | | | the pair of elements is a legal type. llvm-svn: 23804
* Add the ability to lower return instructions to TargetLowering. ThisNate Begeman2005-10-181-2/+7
| | | | | | | allows us to lower legal return types to something else, to meet ABI requirements (such as that i64 be returned in two i32 regs on Darwin/ppc). llvm-svn: 23802
* Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zeroChris Lattner2005-10-181-0/+1
| | | | | | sized stack object if either the array size or the type size is zero. llvm-svn: 23801
* remove hackChris Lattner2005-10-181-3/+1
| | | | llvm-svn: 23797
* Fold (select C, load A, load B) -> load (select C, A, B). This happens quiteChris Lattner2005-10-181-7/+82
| | | | | | | | | | | | | | | | | | | | | | a lot throughout many programs. In particular, specfp triggers it a bunch for constant FP nodes when you have code like cond ? 1.0 : -1.0. If the PPC ISel exposed the loads implicit in pic references to external globals, we would be able to eliminate a load in cases like this as well: %X = external global int %Y = external global int int* %test4(bool %C) { %G = select bool %C, int* %X, int* %Y ret int* %G } Note that this breaks things that use SrcValue's (see the fixme), but since nothing uses them yet, this is ok. Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly. llvm-svn: 23781
* Implement some feedback from Chris re: constant canonicalizationNate Begeman2005-10-181-39/+27
| | | | llvm-svn: 23777
* Legalize BUILD_PAIR appropriately for upcoming 64 bit PowerPC work.Nate Begeman2005-10-181-0/+25
| | | | llvm-svn: 23776
* fold fmul X, +2.0 -> fadd X, X;Nate Begeman2005-10-171-14/+17
| | | | llvm-svn: 23774
* add a trivial foldChris Lattner2005-10-171-0/+4
| | | | llvm-svn: 23764
* Fix this logic.Chris Lattner2005-10-151-1/+1
| | | | llvm-svn: 23756
* Add a case we were missing that was causing us to fail ↵Chris Lattner2005-10-151-0/+14
| | | | | | CodeGen/PowerPC/rlwinm.ll:test3 llvm-svn: 23755
* Use getExtLoad here instead of getNode, as extloads produce two values. ThisChris Lattner2005-10-151-2/+3
| | | | | | fixes a legalize failure on SPASS for itanium. llvm-svn: 23747
* fold sext_in_reg, sext_in_reg where both have the same VT. This wasNate Begeman2005-10-141-1/+1
| | | | | | popping up in Fourinarow. llvm-svn: 23722
* Relax the checking on zextload generation a bit, since as sabre pointed outNate Begeman2005-10-142-27/+49
| | | | | | | | | | you could be AND'ing with the result of a shift that shifts out all the bits you care about, in addition to a constant. Also, move over an add/sub_parts fold from legalize to the dag combiner, where it works for things other than constants. Woot! llvm-svn: 23720
* Fix the trunc(load) case, finally allowing crafty and povray to passChris Lattner2005-10-131-1/+2
| | | | llvm-svn: 23718
* Fix some bugs in (sext (load x))Chris Lattner2005-10-131-1/+2
| | | | llvm-svn: 23717
* When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chainChris Lattner2005-10-131-2/+28
| | | | | | is also legal. Add support for ExpandOp'ing raw EXTLOADs too. llvm-svn: 23716
* Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to LegalizeChris Lattner2005-10-131-0/+10
| | | | llvm-svn: 23715
* Fix the remaining DAGCombiner issues pointed out by sabre. This should fixNate Begeman2005-10-131-16/+11
| | | | | | the remainder of the failures introduced by my patch last night. llvm-svn: 23714
* Fix a minor bug in the dag combiner that broke pcompress2 and some otherChris Lattner2005-10-131-4/+3
| | | | | | tests. llvm-svn: 23713
* Add support to Legalize for expanding i64 sextload/zextload into hi and loNate Begeman2005-10-131-0/+35
| | | | | | | parts. This should fix the crafty and signed long long unit test failure on x86 last night. llvm-svn: 23711
* Inhibit instructions from being pushed before function calls. This willJim Laskey2005-10-131-3/+55
| | | | | | minimize unnecessary spilling. llvm-svn: 23710
* Move some Legalize functionality over to the DAGCombiner where it belongs.Nate Begeman2005-10-133-149/+79
| | | | | | Kill some dead code. llvm-svn: 23706
* Fix a potential bug with two combine-to's back to back that chris pointedNate Begeman2005-10-121-4/+14
| | | | | | | | | | out, where after the first CombineTo() call, the node the second CombineTo wishes to replace may no longer exist. Fix a very real bug with the truncated load optimization on little endian targets, which do not need a byte offset added to the load. llvm-svn: 23704
* More cool stuff for the dag combiner. We can now finally handle thingsNate Begeman2005-10-121-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | like turning: _foo: fctiwz f0, f1 stfd f0, -8(r1) lwz r2, -4(r1) rlwinm r3, r2, 0, 16, 31 blr into _foo: fctiwz f0,f1 stfd f0,-8(r1) lhz r3,-2(r1) blr Also removed an unncessary constraint from sra -> srl conversion, which should take care of hte only reason we would ever need to handle sra in MaskedValueIsZero, AFAIK. llvm-svn: 23703
* Finally committing to the new scheduler. Still -sched=none by default.Jim Laskey2005-10-121-249/+125
| | | | llvm-svn: 23702
* Added graphviz/gv support for MF.Jim Laskey2005-10-121-0/+22
| | | | llvm-svn: 23700
* Fix a powerpc crash on CodeGen/Generic/llvm-ct-intrinsics.llChris Lattner2005-10-111-1/+1
| | | | llvm-svn: 23694
* Add a canonicalization that got lost, fixing PowerPC/fold-li.ll:SUBChris Lattner2005-10-111-3/+5
| | | | llvm-svn: 23693
* clean up some corner casesChris Lattner2005-10-101-2/+6
| | | | llvm-svn: 23692
* Implement trivial DSE. If two stores are neighbors and store to the sameChris Lattner2005-10-101-0/+29
| | | | | | | location, replace them with a new store of the last value. This occurs in the same neighborhood in 197.parser, speeding it up about 1.5% llvm-svn: 23691
* Add support for CombineTo, allowing the dag combiner to replace nodes withChris Lattner2005-10-101-2/+56
| | | | | | | | | | | | | | | | | | | | multiple results. Use this support to implement trivial store->load forwarding, implementing CodeGen/PowerPC/store-load-fwd.ll. Though this is the most simple case and can be extended in the future, it is still useful. For example, it speeds up 197.parser by 6.2% by avoiding an LSU reject in xalloc: stw r6, lo16(l5_end_of_array)(r2) addi r2, r5, -4 stwx r5, r4, r2 - lwzx r5, r4, r2 - rlwinm r5, r5, 0, 0, 30 stwx r5, r4, r2 lwz r2, -4(r4) ori r2, r2, 1 llvm-svn: 23690
* Teach the DAGCombiner several new tricks, teaching it how to turnNate Begeman2005-10-101-32/+46
| | | | | | | sext_inreg into zext_inreg based on the signbit (fires a lot), srem into urem, etc. llvm-svn: 23688
* Fix commentChris Lattner2005-10-101-1/+1
| | | | llvm-svn: 23686
* Add ISD::ADD to MaskedValueIsZeroChris Lattner2005-10-101-0/+8
| | | | llvm-svn: 23685
* This function is now deadChris Lattner2005-10-101-110/+0
| | | | llvm-svn: 23684
* Enable Nate's excellent DAG combiner work by default. This allows theChris Lattner2005-10-102-558/+18
| | | | | | removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp. llvm-svn: 23682
* add a todo for something I noticedChris Lattner2005-10-091-0/+4
| | | | llvm-svn: 23679
* (X & Y) & C == 0 if either X&C or Y&C are zeroChris Lattner2005-10-092-3/+12
| | | | llvm-svn: 23678
* When emiting a CopyFromReg and the source is already a vreg, do not botherChris Lattner2005-10-091-27/+31
| | | | | | | | | | | creating a new vreg and inserting a copy: just use the input vreg directly. This speeds up the compile (e.g. about 5% on mesa with a debug build of llc) by not adding a bunch of copies and vregs to be coallesced away. On mesa, for example, this reduces the number of intervals from 168601 to 129040 going into the coallescer. llvm-svn: 23671
* Lo and behold, the last bits of SelectionDAG.cpp have been moved over.Nate Begeman2005-10-081-6/+150
| | | | llvm-svn: 23665
* remove debugging codeChris Lattner2005-10-071-5/+1
| | | | llvm-svn: 23663
* implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits throughChris Lattner2005-10-072-1/+41
| | | | | | C-X's llvm-svn: 23662
* fix indentationChris Lattner2005-10-071-57/+57
| | | | llvm-svn: 23660
* Turn sdivs into udivs when we can prove the sign bits are clear. ThisChris Lattner2005-10-072-0/+21
| | | | | | implements CodeGen/PowerPC/div-2.ll llvm-svn: 23659
* silence a bogus GCC warningChris Lattner2005-10-061-1/+1
| | | | llvm-svn: 23646
* Fix the LLC regressions on X86 last night. In particular, when undoingChris Lattner2005-10-061-5/+12
| | | | | | | | | previous copy elisions and we discover we need to reload a register, make sure to use the regclass of the original register for the reload, not the class of the current register. This avoid using 16-bit loads to reload 32-bit values. llvm-svn: 23645
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