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| author | Jeff Cohen <jeffc@jolt-lang.org> | 2005-11-12 00:59:01 +0000 |
|---|---|---|
| committer | Jeff Cohen <jeffc@jolt-lang.org> | 2005-11-12 00:59:01 +0000 |
| commit | cf1f782a2f5f217b4f0c556291c5a7f2275e521c (patch) | |
| tree | 7e8d063023e34e71415314d52853a731d6750b9d /llvm/lib/CodeGen | |
| parent | 662c8726b89887788e94fc531ca201e75193909d (diff) | |
| download | bcm5719-llvm-cf1f782a2f5f217b4f0c556291c5a7f2275e521c.tar.gz bcm5719-llvm-cf1f782a2f5f217b4f0c556291c5a7f2275e521c.zip | |
Fix operator precedence bug caught by VC++.
llvm-svn: 24318
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index ca137431a00..6cd66c7c19c 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -967,8 +967,8 @@ SDOperand DAGCombiner::visitAND(SDNode *N) { // fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1) if (N1C && N0.getOpcode() == ISD::SIGN_EXTEND_INREG) { unsigned ExtendBits = - MVT::getSizeInBits(cast<VTSDNode>(N0.getOperand(1))->getVT()); - if (ExtendBits == 64 || (N1C->getValue() & (~0ULL << ExtendBits) == 0)) + MVT::getSizeInBits(cast<VTSDNode>(N0.getOperand(1))->getVT()); + if (ExtendBits == 64 || ((N1C->getValue() & (~0ULL << ExtendBits)) == 0)) return DAG.getNode(ISD::AND, VT, N0.getOperand(0), N1); } // fold (and (or x, 0xFFFF), 0xFF) -> 0xFF |
