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* [GlobalISel] LegalizerHelper: Lower (G_FSUB X, Y) to (G_FADD X, (G_FNEG Y))Volkan Keles2017-03-101-0/+18
| | | | | | | | | | | | | | Summary: No test case as none of the in-tree targets with GlobalISel support has this condition. Reviewers: qcolombet, aditya_nandakumar, dsanders, t.p.northover, ab Reviewed By: qcolombet Subscribers: dberris, rovka, kristof.beyls, llvm-commits, igorb Differential Revision: https://reviews.llvm.org/D30786 llvm-svn: 297512
* GlobalISel: Translate ConstantAggregateZero vectorsVolkan Keles2017-03-101-1/+10
| | | | | | | | | | | | Reviewers: qcolombet, aditya_nandakumar, dsanders, ab, t.p.northover, javed.absar Reviewed By: qcolombet Subscribers: dberris, rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30259 llvm-svn: 297509
* [GlobalISel] Translate insertelement and extractelementVolkan Keles2017-03-102-0/+70
| | | | | | | | | | | | Reviewers: qcolombet, aditya_nandakumar, dsanders, ab, t.p.northover, javed.absar Reviewed By: qcolombet Subscribers: dberris, rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30761 llvm-svn: 297495
* [SelectionDAG] Add support for BUILD_VECTOR to ComputeNumSignBitsSimon Pilgrim2017-03-101-0/+6
| | | | llvm-svn: 297492
* [GlobalISel] Make LegalizerInfo accessible in LegalizerHelperVolkan Keles2017-03-102-11/+8
| | | | | | | | | | | | | | | | | | | | Summary: We don’t actually use LegalizerInfo in Legalizer pass, it’s just passed as an argument. In order to check if an instruction is legal or not, we need to get LegalizerInfo by calling `MI.getParent()->getParent()->getSubtarget().getLegalizerInfo()`. Instead, make LegalizerInfo accessible in LegalizerHelper. Reviewers: qcolombet, aditya_nandakumar, dsanders, ab, t.p.northover, kristof.beyls Reviewed By: qcolombet Subscribers: dberris, llvm-commits, rovka Differential Revision: https://reviews.llvm.org/D30838 llvm-svn: 297491
* [SelectionDAG] Make SelectionDAG aware of the known bits in USUBO and SSUBO ↵Amaury Sechet2017-03-101-4/+13
| | | | | | | | | | | | | | | | | and SUBC. Summary: Depends on D30379 This improves the state of things for the sub class of operation. Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30436 llvm-svn: 297482
* [SelectionDAG] Make SelectionDAG aware of the known bits in UADDO and SADDO.Amaury Sechet2017-03-101-13/+37
| | | | | | | | | | | | Summary: As per title. This is extracted from D29872 and I threw SADDO in. Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30379 llvm-svn: 297479
* [APInt] Add APInt::insertBits() method to insert an APInt into a larger APIntSimon Pilgrim2017-03-101-4/+4
| | | | | | | | | | | | We currently have to insert bits via a temporary variable of the same size as the target with various shift/mask stages, resulting in further temporary variables, all of which require the allocation of memory for large APInts (MaskSizeInBits > 64). This is another of the compile time issues identified in PR32037 (see also D30265). This patch adds the APInt::insertBits() helper method which avoids the temporary memory allocation and masks/inserts the raw bits directly into the target. Differential Revision: https://reviews.llvm.org/D30780 llvm-svn: 297458
* [GlobalISel] Use ImmutableCallSite instead of templates. NFC.Ahmed Bougacha2017-03-102-21/+10
| | | | | | ImmutableCallSite abstracts away CallInst and InvokeInst. Use it! llvm-svn: 297426
* [GlobalISel] Fallback when failing to translate invoke.Ahmed Bougacha2017-03-101-3/+4
| | | | | | | | We unintentionally stopped falling back in r293670. While there, change an unusual construct. llvm-svn: 297425
* GlobalISel: support trivial inlineasm calls.Tim Northover2017-03-091-1/+20
| | | | | | They're used for nefarious purposes by ObjC. llvm-svn: 297422
* Refactor alias check from MISched into common helper. NFC.Eli Friedman2017-03-092-61/+60
| | | | | | Differential Revision: https://reviews.llvm.org/D30598 llvm-svn: 297421
* [DAGCombiner] Do various combine on uaddo.Amaury Sechet2017-03-091-0/+35
| | | | | | | | | | | | Summary: This essentially does the same transform as for ADC. Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30417 llvm-svn: 297416
* GlobalISel: inform FrameLowering when we emit a function call.Tim Northover2017-03-092-0/+2
| | | | | | | Amongst other things (I expect) this is necessary to ensure decent backtraces when an "unreachable" is involved. llvm-svn: 297413
* GlobalISel: put debug info for static allocas in the MachineFunction.Tim Northover2017-03-092-8/+9
| | | | | | | | | | | | | | The good reason to do this is that static allocas are pretty simple to handle (especially at -O0) and avoiding tracking DBG_VALUEs throughout the pipeline should give some kind of performance benefit. The bad reason is that the debug pipeline is an unholy mess of implicit contracts, where determining whether "DBG_VALUE %reg, imm" actually implies a load or not involves the services of at least 3 soothsayers and the sacrifice of at least one chicken. And it still gets it wrong if the variable is at SP directly. llvm-svn: 297410
* [DAGCombiner] Do various combine on usubo.Amaury Sechet2017-03-091-0/+34
| | | | | | | | | | | | Summary: This essentially does the same transform as for SUBC. Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30437 llvm-svn: 297404
* [DAG] recognize div/rem by 0 as undef before trying constant foldingSanjay Patel2017-03-092-11/+17
| | | | | | | | | | | | | | | | | | | | As discussed in the review thread for rL297026, this is actually 2 changes that would independently fix all of the test cases in the patch: 1. Return undef in FoldConstantArithmetic for div/rem by 0. 2. Move basic undef simplifications for div/rem (simplifyDivRem()) before foldBinopIntoSelect() as a matter of efficiency. I will handle the case of vectors with any zero element as a follow-up. That change is the DAG sibling for D30665 + adding a check of vector elements to FoldConstantVectorArithmetic(). I'm deleting the test for PR30693 because it does not test for the actual bug any more (dangers of using bugpoint). Differential Revision: https://reviews.llvm.org/D30741 llvm-svn: 297384
* [SSP] In opt remarks, stream Function directlyAdam Nemet2017-03-091-9/+14
| | | | | | | With this, it shows up as an attribute in YAML and non-printable characters are properly removed by GlobalValue::getRealLinkageName. llvm-svn: 297362
* DAG: Check no signed zeros instead of unsafe math attributeMatt Arsenault2017-03-091-2/+2
| | | | llvm-svn: 297354
* [DebugInfo] Emit address space with DW_AT_address_class attribute for ↵Konstantin Zhuravlyov2017-03-081-0/+7
| | | | | | | | pointer and reference types Differential Revision: https://reviews.llvm.org/D29670 llvm-svn: 297320
* [Outliner] Fix memory leak in suffix tree.Jessica Paquette2017-03-081-9/+9
| | | | | | | | This commit changes the BumpPtrAllocator for suffix tree nodes to a SpecificBumpPtrAllocator. Before, node construction was leaking memory because of the DenseMap in SuffixTreeNodes. Changing this to a SpecificBumpPtrAllocator allows this memory to properly be released. llvm-svn: 297319
* GlobalISel: correctly handle trivial fcmp predicates.Tim Northover2017-03-081-1/+4
| | | | | | | It makes sense to only do them once in IRTranslator rather than making everyone deal with them. llvm-svn: 297304
* [GlobalISel] Add default action for G_FNEGVolkan Keles2017-03-082-0/+36
| | | | | | | | | | | | | | Summary: rL297171 introduced G_FNEG for floating-point negation instruction and IRTranslator started to translate `FSUB -0.0, X` to `FNEG X`. This patch adds a default action for G_FNEG to avoid breaking existing targets. Reviewers: qcolombet, ab, kristof.beyls, t.p.northover, aditya_nandakumar, dsanders Reviewed By: qcolombet Subscribers: dberris, rovka, llvm-commits Differential Revision: https://reviews.llvm.org/D30721 llvm-svn: 297301
* [DAGCombine] Simplify ISD::AND in GetDemandedBits.Eli Friedman2017-03-081-0/+11
| | | | | | | | | This helps in cases involving bitfields where an AND is exposed by legalization. Differential Revision: https://reviews.llvm.org/D30472 llvm-svn: 297249
* [DebugInfo] Make legal and emit DW_OP_swap and DW_OP_xderefKonstantin Zhuravlyov2017-03-081-0/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D29672 llvm-svn: 297247
* Fix additional constructor call missed by r297241.Daniel Sanders2017-03-071-1/+1
| | | | | | It was added between my build+test and my commit. llvm-svn: 297244
* Recommit: [globalisel] Change LLT constructor string into an LLT-based ↵Daniel Sanders2017-03-072-56/+23
| | | | | | | | | | | | | | | | | | | | object that knows how to generate it. Summary: This will allow future patches to inspect the details of the LLT. The implementation is now split between the Support and CodeGen libraries to allow TableGen to use this class without introducing layering concerns. Thanks to Ahmed Bougacha for finding a reasonable way to avoid the layering issue and providing the version of this patch without that problem. The problem with the previous commit appears to have been that TableGen was including CodeGen/LowLevelType.h instead of Support/LowLevelTypeImpl.h. Reviewers: t.p.northover, qcolombet, rovka, aditya_nandakumar, ab, javed.absar Subscribers: arsenm, nhaehnle, mgorny, dberris, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30046 llvm-svn: 297241
* GlobalISel: use inserts for landingpad instead of sequences.Tim Northover2017-03-071-26/+28
| | | | llvm-svn: 297237
* GlobalISel: fix legalization of G_INSERTTim Northover2017-03-071-14/+19
| | | | | | | | We were calculating incorrect extract/insert offsets by trying to be too tricksy with min/max. It's clearer to just split the logic up into "register starts before this segment" vs "after". llvm-svn: 297226
* Implement FreeMachineFunction::getPassName().Yaron Keren2017-03-071-0/+4
| | | | llvm-svn: 297222
* [GlobalISel] Don't translate intrinsics with metadata parameters.Ahmed Bougacha2017-03-071-0/+3
| | | | | | | | | Some intrinsics take metadata parameters. These all need custom handling of some form, and cannot possibly be lowered generically to G_INTRINSIC calls with vreg operands. Reject them, instead of hitting an assert later in getOrCreateVReg. llvm-svn: 297209
* [GlobalISel] Avoid invalidating ValToVReg when translating no-op bitcast.Ahmed Bougacha2017-03-071-2/+7
| | | | | | | | | | | | | | | | | When we translate a no-op (same type) bitcast, we try to be clever and only emit a COPY if we already assigned a vreg to the defined value. However, when we didn't, we tried to assign to a reference into the ValToVReg DenseMap, even though the RHS of the assignment (getOrCreateVReg) could potentially grow that DenseMap, invalidating the reference. Avoid that by getting the source vreg first. I audited the rest of the translator; this is the only tricky case. The test is quite unwieldy, as the problem is caused by the DenseMap growing, which happens after the 47th mapped value. llvm-svn: 297208
* [GlobalISel] Relax vector G_SELECT assertion.Ahmed Bougacha2017-03-071-3/+4
| | | | | | | | | | | For vector operands, the `select` instruction supports both vector and non-vector conditions. The MIR builder had an overly restrictive assertion, that only accepted vector conditions for vector selects (in effect implementing ISD::VSELECT). Make it possible to express the full range of G_SELECTs. llvm-svn: 297207
* [GlobalISel] Slightly clean up DBG_VALUE FP build code.Ahmed Bougacha2017-03-071-2/+1
| | | | | | | I messed up my rebases leading to r297200, and ended up with stale (but working) code. Fix it. llvm-svn: 297205
* [GlobalISel] Ignore %noreg when applying default regbank mapping.Ahmed Bougacha2017-03-071-0/+7
| | | | | | | | | | | | | When computing the mapping for non-generic instructions, we skipped %noreg operands, because we can't always reason about their banks. Also skip them when applying the mapping. Otherwise, we could end up with mappings that we can't apply. While there, duplicate an assert to distinguish between the two error conditions. llvm-svn: 297201
* [GlobalISel] Emit DBG_VALUE %noreg for non-int/fp constant values.Ahmed Bougacha2017-03-071-1/+6
| | | | | | | | When a dbg_value has a constant operand that isn't representable in MI, there isn't much we can do. Use %noreg (0) for those situations. This matches the SelectionDAG behavior. llvm-svn: 297200
* SjLjEHPrepare: Fix the pass for swifterror argumentsArnold Schwaighofer2017-03-071-0/+22
| | | | | | | | | | | We cannot leave the identity copies 'select true, arg, undef' that this pass inserts for arguments to simplify handling of values on swifterror arguments. swifterror arguments have restrictions on their uses. rdar://30839288 llvm-svn: 297197
* Revert r297177: Change LLT constructor string into an LLT-based object ...Daniel Sanders2017-03-072-23/+56
| | | | | | | | | | More module problems. This time it only showed up in the stage 2 compile of clang-x86_64-linux-selfhost-modules-2 but not the stage 1 compile. Somehow, this change causes the build to need Attributes.gen before it's been generated. llvm-svn: 297188
* [globalisel] Change LLT constructor string into an LLT-based object that ↵Daniel Sanders2017-03-072-56/+23
| | | | | | | | | | | | | | | | | | knows how to generate it. Summary: This will allow future patches to inspect the details of the LLT. The implementation is now split between the Support and CodeGen libraries to allow TableGen to use this class without introducing layering concerns. Thanks to Ahmed Bougacha for finding a reasonable way to avoid the layering issue and providing the version of this patch without that problem. Reviewers: t.p.northover, qcolombet, rovka, aditya_nandakumar, ab, javed.absar Subscribers: arsenm, nhaehnle, mgorny, dberris, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30046 llvm-svn: 297177
* [GlobalISel] Translate floating-point negationVolkan Keles2017-03-071-0/+12
| | | | | | | | | | | | Reviewers: qcolombet, javed.absar, aditya_nandakumar, dsanders, t.p.northover, ab Reviewed By: qcolombet Subscribers: dberris, rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30671 llvm-svn: 297171
* GlobalISel: restrict G_EXTRACT instruction to just one operand.Tim Northover2017-03-063-26/+17
| | | | | | | A bit more painful than G_INSERT because it was more widely used, but this should simplify the handling of extract operations in most locations. llvm-svn: 297100
* [DAG] refactor related div/rem folds; NFCISanjay Patel2017-03-061-28/+32
| | | | | | | | | | | This is known incomplete and not called in the right order relative to other folds, but that's the current behavior. I'm just trying to clean this up before making actual functional changes to make the patch smaller. The logic here should mimic the IR equivalents that are in InstSimplify's simplifyDivRem(). llvm-svn: 297086
* [DWARFv5] Update definitions to match published spec.Paul Robinson2017-03-061-2/+16
| | | | | | | | | | | | | Some late additions to DWARF v5 were not in Dwarf.def; also one form was redefined. Add the new cases to relevant switches in different parts of LLVM. Replace DW_FORM_ref_sup with DW_FORM_ref_sup[4,8]. I did not add support for DW_FORM_strx3/addrx3 other that defining the constants. We don't have any infrastructure to support these. Differential Revision: http://reviews.llvm.org/D30664 llvm-svn: 297085
* [Outliner] Fixed Asan bot failure in r296418Jessica Paquette2017-03-064-0/+1407
| | | | | | | | Fixed the asan bot failure which led to the last commit of the outliner being reverted. The change is in lib/CodeGen/MachineOutliner.cpp in the SuffixTree's constructor. LeafVector is no longer initialized using reserve but just a standard constructor. llvm-svn: 297081
* [IfConversion] Only renormalize probabilities if branches are analyzableKrzysztof Parzyszek2017-03-061-2/+4
| | | | | | | | | | | If a block has non-analyzable branches, the listed successors don't need to add up to one. For example, if a block has a conditional tail call, that tail call will not have a corresponding successor in the successor list, but will still be a possible branch. Differential Revision: https://reviews.llvm.org/D30556 llvm-svn: 297054
* GlobalISel: don't emit degenerate G_INSERT instructions.Tim Northover2017-03-061-0/+25
| | | | | | | | | | | Before, we were producing G_INSERT instructions that were actually closer to a cast or even a COPY when both input and output sizes are the same. This doesn't really make sense and means that everything interpreting a G_INSERT also has to handle all these kinds of casts. So now we detect these degenerate cases and emit real casts instead. llvm-svn: 297051
* GlobalISel: add buildUndef method to MachineIRBuilder. NFC.Tim Northover2017-03-062-1/+5
| | | | llvm-svn: 297044
* GlobalISel: refactor legalization of G_INSERT.Tim Northover2017-03-061-37/+23
| | | | | | | | Now that G_INSERT instructions can only insert one register, this code was overly general. In another direction it didn't handle registers that crossed split boundaries properly, which needed to be fixed. llvm-svn: 297042
* [DAGCombiner] simplify div/rem-by-0Sanjay Patel2017-03-061-1/+10
| | | | | | | | | | | | | | | | | Refactoring of duplicated code and more fixes to follow. This is motivated by the post-commit comments for r296699: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20170306/435182.html Ie, we can crash if we're missing obvious simplifications like this that exist in the IR simplifier or if these occur later than expected. The x86 change for non-splat division shows a potential opportunity to improve vector codegen: we assumed that since only one lane had meaningful results, we should do the math in scalar. But that means moving back and forth from vector registers. llvm-svn: 297026
* [DAG] fix formatting; NFCSanjay Patel2017-03-061-2/+1
| | | | llvm-svn: 297015
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