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author | Tim Northover <tnorthover@apple.com> | 2017-03-07 23:04:06 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2017-03-07 23:04:06 +0000 |
commit | 542d1c14634e444ce167d732a72a67e14d692728 (patch) | |
tree | 1535c6969ac9d51bc6b4de90a6bee0be2e5b9184 /llvm/lib/CodeGen | |
parent | 7a5cfa9a11d6342e3a8254f8bcaa28bf40580c0b (diff) | |
download | bcm5719-llvm-542d1c14634e444ce167d732a72a67e14d692728.tar.gz bcm5719-llvm-542d1c14634e444ce167d732a72a67e14d692728.zip |
GlobalISel: use inserts for landingpad instead of sequences.
llvm-svn: 297237
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 54 |
1 files changed, 28 insertions, 26 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 869589b9aa7..817428bfb03 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -838,40 +838,42 @@ bool IRTranslator::translateLandingPad(const User &U, MIRBuilder.buildInstr(TargetOpcode::EH_LABEL) .addSym(MF->addLandingPad(&MBB)); + LLT Ty{*LP.getType(), *DL}; + unsigned Undef = MRI->createGenericVirtualRegister(Ty); + MIRBuilder.buildUndef(Undef); + SmallVector<LLT, 2> Tys; for (Type *Ty : cast<StructType>(LP.getType())->elements()) Tys.push_back(LLT{*Ty, *DL}); assert(Tys.size() == 2 && "Only two-valued landingpads are supported"); // Mark exception register as live in. - SmallVector<unsigned, 2> Regs; - SmallVector<uint64_t, 2> Offsets; - if (unsigned Reg = TLI.getExceptionPointerRegister(PersonalityFn)) { - MBB.addLiveIn(Reg); - unsigned VReg = MRI->createGenericVirtualRegister(Tys[0]); - MIRBuilder.buildCopy(VReg, Reg); - Regs.push_back(VReg); - Offsets.push_back(0); - } + unsigned ExceptionReg = TLI.getExceptionPointerRegister(PersonalityFn); + if (!ExceptionReg) + return false; - if (unsigned Reg = TLI.getExceptionSelectorRegister(PersonalityFn)) { - MBB.addLiveIn(Reg); - - // N.b. the exception selector register always has pointer type and may not - // match the actual IR-level type in the landingpad so an extra cast is - // needed. - unsigned PtrVReg = MRI->createGenericVirtualRegister(Tys[0]); - MIRBuilder.buildCopy(PtrVReg, Reg); - - unsigned VReg = MRI->createGenericVirtualRegister(Tys[1]); - MIRBuilder.buildInstr(TargetOpcode::G_PTRTOINT) - .addDef(VReg) - .addUse(PtrVReg); - Regs.push_back(VReg); - Offsets.push_back(Tys[0].getSizeInBits()); - } + MBB.addLiveIn(ExceptionReg); + unsigned VReg = MRI->createGenericVirtualRegister(Tys[0]), + Tmp = MRI->createGenericVirtualRegister(Ty); + MIRBuilder.buildCopy(VReg, ExceptionReg); + MIRBuilder.buildInsert(Tmp, Undef, VReg, 0); + + unsigned SelectorReg = TLI.getExceptionSelectorRegister(PersonalityFn); + if (!SelectorReg) + return false; + + MBB.addLiveIn(SelectorReg); + + // N.b. the exception selector register always has pointer type and may not + // match the actual IR-level type in the landingpad so an extra cast is + // needed. + unsigned PtrVReg = MRI->createGenericVirtualRegister(Tys[0]); + MIRBuilder.buildCopy(PtrVReg, SelectorReg); - MIRBuilder.buildSequence(getOrCreateVReg(LP), Regs, Offsets); + VReg = MRI->createGenericVirtualRegister(Tys[1]); + MIRBuilder.buildInstr(TargetOpcode::G_PTRTOINT).addDef(VReg).addUse(PtrVReg); + MIRBuilder.buildInsert(getOrCreateVReg(LP), Tmp, VReg, + Tys[0].getSizeInBits()); return true; } |