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* [DAGCombiner] make sure we have a whole-number extract before trying to narro...Sanjay Patel2018-11-011-1/+5
* [CodeView] Emit the correct TypeIndex for std::nullptr_t.Zachary Turner2018-11-011-0/+2
* [COFF, ARM64] Implement Intrinsic.sponentry for AArch64Mandeep Singh Grang2018-10-313-0/+6
* Check shouldReduceLoadWidth from SimplifySetCCStanislav Mekhanoshin2018-10-311-1/+2
* [SelectionDAG] Handle constant range [0,1) in lowerRangeToAssertZExtScott Linder2018-10-311-1/+2
* [SelectionDAGISel] Suppress a -Wunused-but-set-variable warning in release bu...Craig Topper2018-10-311-0/+1
* Fix comment typo. NFCI.Simon Pilgrim2018-10-311-1/+1
* [SelectionDAG] SelectionDAGLegalize::ExpandBITREVERSE - ensure we use ShiftTySimon Pilgrim2018-10-311-6/+6
* [globalisel][irtranslator] Verify that DILocations aren't lost in translationDaniel Sanders2018-10-311-23/+69
* MachineModuleInfo: Initialize DbgInfoAvailable depending on debug_cus existingMatthias Braun2018-10-313-3/+8
* [DAGCombiner] Fold 0 div/rem X to 0David Bolvansky2018-10-311-2/+5
* ADT/STLExtras: Introduce llvm::empty; NFCMatthias Braun2018-10-314-5/+4
* MachineOperand/MIParser: Do not print debug-use flag, infer itMatthias Braun2018-10-302-2/+4
* [FPEnv] [FPEnv] Add constrained intrinsics for MAXNUM and MINNUMCameron McInally2018-10-306-0/+26
* [ScalarizeMaskedMemIntrin] Limit the scope of some variables that are only us...Craig Topper2018-10-301-8/+5
* [DAGCombiner] Fix for big endian in ForwardStoreValueToDirectLoadBjorn Pettersson2018-10-301-9/+13
* [DAG] Add const variants for BaseIndexOffset functions.Nirav Dave2018-10-301-3/+4
* [SchedModel] Fix for read advance cycles with implicit pseudo operands.Jonas Paulsson2018-10-301-4/+16
* [DAGCombiner] narrow vector binops when extraction is cheapSanjay Patel2018-10-301-11/+30
* [SelectionDAG] fix build warning for mismatched signs in compare; NFCSanjay Patel2018-10-301-1/+1
* [llc] Error out when -print-machineinstrs is used with an unknown passFrancis Visoiu Mistrih2018-10-301-9/+11
* [SelectionDAG] Add FoldBUILD_VECTOR to simplify new BUILD_VECTOR nodesSimon Pilgrim2018-10-301-0/+58
* [DAGCombiner] Improve X div/rem Y fold if single bit element typeDavid Bolvansky2018-10-301-3/+4
* [LegalizeTypes] Teach PromoteIntRes_BITCAST to better handle a bitcast with v...Craig Topper2018-10-301-0/+20
* Remove dead declarationMatt Arsenault2018-10-301-7/+0
* Pass TRI to printRegMatt Arsenault2018-10-301-1/+1
* [MachineOutliner] Inherit target features from parent functionJessica Paquette2018-10-291-0/+8
* [Intrinsic] Signed and Unsigned Saturation Subtraction IntirnsicsLeonard Chan2018-10-299-31/+92
* [SelectionDAG] Fix bad indentation. NFCCraig Topper2018-10-281-4/+4
* [TargetLowering] Move i64/vXi64 to f32/vXf32 UINT_TO_FP handling to TargetLow...Simon Pilgrim2018-10-282-56/+72
* [VectorLegalizer] Enable TargetLowering::expandFP_TO_UINT support.Simon Pilgrim2018-10-282-3/+21
* [DAGCombiner] Better constant vector support for FCOPYSIGN.Craig Topper2018-10-281-4/+4
* [TargetLowering] Move LegalizeDAG FP_TO_UINT handling to TargetLowering::expa...Simon Pilgrim2018-10-272-22/+34
* [ARM64][Windows] MCLayer support for exception handlingSanjin Sijaric2018-10-272-7/+24
* [DAGCombiner] rearrange code in narrowExtractedVectorBinOp(); NFCSanjay Patel2018-10-261-22/+24
* [LegalizeTypes] Stop DAGTypeLegalizer::getSETCCWidenedResultTy from creating ...Craig Topper2018-10-263-16/+11
* [ARM] Make InstrEmitter mark CPSR defs dead for Thumb1.Eli Friedman2018-10-261-1/+1
* [Codegen] - Implement basic .debug_loclists section emission (DWARF5).George Rimar2018-10-264-53/+152
* Reland "[WebAssembly] LSDA info generation"Heejin Ahn2018-10-2511-58/+234
* Fix in MachineOperand::printIRValueReference().Jonas Paulsson2018-10-251-1/+2
* DebugInfo: Explain why DW_LLE_(GNU_)startx_length is usedDavid Blaikie2018-10-251-4/+7
* [Pipeliner] Ignore Artificial dependences while computing recurrences.Sumanth Gundapaneni2018-10-251-3/+3
* [Pipeliner] Remove the unneeded include header(NFC).Sumanth Gundapaneni2018-10-251-1/+0
* [FPEnv] Last BinaryOperator::isFNeg(...) to m_FNeg(...) changesCameron McInally2018-10-251-5/+8
* [GlobalISel] LegalizerHelper: Fix the incorrect alignment when splitting load...Volkan Keles2018-10-251-6/+6
* [LegalizeDAG] Remove dead SINT_TO_FP legalization codeSimon Pilgrim2018-10-251-54/+19
* [GISel] LegalizerInfo: Rename MemDesc::Size to SizeInBits to make the value c...Volkan Keles2018-10-252-3/+3
* [GlobalISel] Use the target preferred type for G_EXTRACT_VECTOR_ELT index.Amara Emerson2018-10-252-1/+22
* Missing semicolon.Simon Pilgrim2018-10-251-1/+1
* [TargetLowering] Improve vXi64 UINT_TO_FP vXf64 support (P38226)Simon Pilgrim2018-10-253-25/+53
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