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* [DAGCombiner] Teach visitEXTRACT_SUBVECTOR to turn extracts of BUILD_VECTOR ↵Craig Topper2017-08-281-0/+23
| | | | | | | | | | into smaller BUILD_VECTORs Only do this before operations are legalized of BUILD_VECTOR is Legal for the target. Differential Revision: https://reviews.llvm.org/D37186 llvm-svn: 311892
* Untabify.NAKAMURA Takumi2017-08-282-6/+6
| | | | llvm-svn: 311875
* [DAGCombiner] allow undef shuffle operands when eliminating bitcasts (PR34111)Sanjay Patel2017-08-271-1/+4
| | | | | | | | As noted in the FIXME, this could be improved more, but this is the smallest fix that helps: https://bugs.llvm.org/show_bug.cgi?id=34111 llvm-svn: 311853
* [DAGCombiner] Extending pattern detection for vector shuffle.Jatin Bhateja2017-08-261-3/+53
| | | | | | | | | | | | | | | | | | Summary: If all the operands of a BUILD_VECTOR extract elements from same vector then split the vector efficiently based on the maximum vector access index. This will also fix PR 33784 Reviewers: zvi, delena, RKSimon, thakis Reviewed By: RKSimon Subscribers: chandlerc, eladcohen, llvm-commits Differential Revision: https://reviews.llvm.org/D35788 llvm-svn: 311833
* Revert rL311247 : To rectify commit message.Jatin Bhateja2017-08-261-53/+3
| | | | | | | | Summary: This reverts commit rL311247. Differential Revision: https://reviews.llvm.org/D36927 llvm-svn: 311832
* Add options to dump block frequency/branch probability info in text.Hiroshi Yamauchi2017-08-261-0/+13
| | | | | | | | | | | | | | | | | | | | | Summary: Add options -print-bfi/-print-bpi that dump block frequency and branch probability info like -view-block-freq-propagation-dags and -view-machine-block-freq-propagation-dags do but in text. This is useful when the graph is very large and complex (the dot command crashes, lines/edges too close to tell apart, hard to navigate without textual search) or simply when text is preferred. Reviewers: davidxl Reviewed By: davidxl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D37165 llvm-svn: 311822
* Fix unused-lambda-capture warning by using default capture-by-refDavid Blaikie2017-08-251-2/+1
| | | | | | | | Since the lambda isn't escaped (via a std::function or similar) it's fine/better to use default capture-by-ref to provide semantics similar to language-level nested scopes (if/for/while/etc). llvm-svn: 311782
* Fix buildbot breakage from r311763. Remove unused lambda capture.Matt Morehouse2017-08-251-2/+1
| | | | llvm-svn: 311781
* [GISel]: Implement widenScalar for Legalizing G_PHIAditya Nandakumar2017-08-252-14/+47
| | | | | | https://reviews.llvm.org/D37018 llvm-svn: 311763
* [DAG] convert vector select-of-constants to logic/mathSanjay Patel2017-08-241-2/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | This goes back to a discussion about IR canonicalization. We'd like to preserve and convert more IR to 'select' than we currently do because that's likely the best choice in IR: http://lists.llvm.org/pipermail/llvm-dev/2016-September/105335.html ...but that's often not true for codegen, so we need to account for this pattern coming in to the backend and transform it to better DAG ops. Steps in this patch: 1. Add an EVT param to the existing convertSelectOfConstantsToMath() TLI hook to more finely enable this transform. Other targets will probably want that anyway to distinguish scalars from vectors. We're using that here to exclude AVX512 targets, but it may not be necessary. 2. Convert a vselect to ext+add. This eliminates a constant load/materialization, and the vector ext is often free. Implementing a more general fold using xor+and can be a follow-up for targets that don't have a legal vselect. It's also possible that we can remove the TLI hook for the special case fold implemented here because we're eliminating a constant, but it needs to be tested on other targets. Differential Revision: https://reviews.llvm.org/D36840 llvm-svn: 311731
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-08-2410-172/+312
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 311703
* Remove duplicate codeVictor Leschuk2017-08-241-4/+0
| | | | llvm-svn: 311675
* Add missing break in switchVictor Leschuk2017-08-241-0/+1
| | | | llvm-svn: 311673
* IPRA: Don't assume called function is first call operandMatt Arsenault2017-08-241-8/+20
| | | | | | | | Fixes not finding the called global for AMDGPU call pseudoinstructions, which prevented IPRA from doing much. llvm-svn: 311637
* IPRA: Exit early on functions without callsMatt Arsenault2017-08-241-0/+5
| | | | llvm-svn: 311636
* Add ‘llvm.experimental.constrained.fma‘ Intrinsic.Wei Ding2017-08-243-3/+24
| | | | | | Differential Revision: http://reviews.llvm.org/D36335 llvm-svn: 311629
* [DAG] Fix Node Replacement in PromoteIntBinOpHans Wennborg2017-08-241-10/+18
| | | | | | | | | | | | | | When one operand is a user of another in a promoted binary operation we may replace and delete the returned value before returning triggering an assertion. Reorder node replacements to prevent this. Fixes PR34137. Landing on behalf of Nirav. Differential Revision: https://reviews.llvm.org/D36581 llvm-svn: 311623
* Retire the llvm.dbg.mir hack after r311594.Adrian Prantl2017-08-234-12/+0
| | | | llvm-svn: 311610
* [GISEl]: Translate phi into G_PHIAditya Nandakumar2017-08-232-1/+18
| | | | | | | | | | G_PHI has the same semantics as PHI but also has types. This lets us verify that the types in the G_PHI are consistent. This also allows specifying legalization actions for G_PHIs. https://reviews.llvm.org/D36990 llvm-svn: 311596
* Attempt to fix the BUILD_SHARED_LIBS build after the DIExpression changeReid Kleckner2017-08-231-1/+1
| | | | llvm-svn: 311595
* Parse and print DIExpressions inline to ease IR and MIR testingReid Kleckner2017-08-233-5/+61
| | | | | | | | | | | | | | | | | | | Summary: Most DIExpressions are empty or very simple. When they are complex, they tend to be unique, so checking them inline is reasonable. This also avoids the need for CodeGen passes to append to the llvm.dbg.mir named md node. See also PR22780, for making DIExpression not be an MDNode. Reviewers: aprantl, dexonsmith, dblaikie Subscribers: qcolombet, javed.absar, eraman, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D37075 llvm-svn: 311594
* Update branch coalescing to be a PowerPC specific passLei Huang2017-08-234-763/+0
| | | | | | | | | | Implementing this pass as a PowerPC specific pass. Branch coalescing utilizes the analyzeBranch method which currently does not include any implicit operands. This is not an issue on PPC but must be handled on other targets. Differential Revision : https: // reviews.llvm.org/D32776 llvm-svn: 311588
* [XRay][CodeGen] Use PIC-friendly code in XRay sleds; remove synthetic ↵Dean Michael Berris2017-08-231-28/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | references in .text Summary: This change achieves two things: - Redefine the Custom Event handling instrumentation points emitted by the compiler to not require dynamic relocation of references to the __xray_CustomEvent trampoline. - Remove the synthetic reference we emit at the end of a function that we used to keep auxiliary sections alive in favour of SHF_LINK_ORDER associated with the section where the function is defined. To achieve the custom event handling change, we've had to introduce the concept of sled versioning -- this will need to be supported by the runtime to allow us to understand how to turn on/off the new version of the custom event handling sleds. That change has to land first before we change the way we write the sleds. To remove the synthetic reference, we rely on a relatively new linker feature that preserves the sections that are associated with each other. This allows us to limit the effects on the .text section of ELF binaries. Because we're still using absolute references that are resolved at runtime for the instrumentation map (and function index) maps, we mark these sections write-able. In the future we can re-define the entries in the map to use relative relocations instead that can be statically determined by the linker. That change will be a bit more invasive so we defer this for later. Depends on D36816. Reviewers: dblaikie, echristo, pcc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D36615 llvm-svn: 311525
* Add test case for r311511Matthias Braun2017-08-233-4/+8
| | | | | | | | This also changes the TailDuplicator to be configured explicitely pre/post regalloc rather than relying on the isSSA() flag. This was necessary to have `llc -run-pass` work reliably. llvm-svn: 311520
* TargetInstrInfo: Change duplicate() to work on bundles.Matthias Braun2017-08-223-11/+29
| | | | | | | | | | | | | | Adds infrastructure to clone whole instruction bundles rather than just single instructions. This fixes a bug where tail duplication would unbundle instructions while cloning. This should unbreak the "Clang Stage 1: cmake, RA, with expensive checks enabled" build on greendragon. The bot broke with r311139 hitting this pre-existing bug. A proper testcase will come next. llvm-svn: 311511
* [SelectionDAG] Make ISD::isConstantSplatVector always return an element ↵Craig Topper2017-08-222-12/+11
| | | | | | | | | | | | sized APInt. This partially reverts r311429 in favor of making ISD::isConstantSplatVector do something not confusing. Turns out the only other user of it was also having to deal with the weird property of it returning a smaller size. So rather than continue to deal with this quirk everywhere, just make the interface do something sane. Differential Revision: https://reviews.llvm.org/D37039 llvm-svn: 311510
* [Debug info] Add new DbgValues after looping over DAGJonas Devlieghere2017-08-221-1/+5
| | | | | | | | | | I was contacted by Jesper Antonsson from Ericsson who ran into problems with r311181 in their test suites with for an out-of-tree target. Because of the latter I don't have a reproducer, but we definitely don't want to modify the data structure on which we are iterating inside the loop. llvm-svn: 311466
* [ARM] Avoid creating duplicate ANDs in SelectionDAGRenato Golin2017-08-221-4/+9
| | | | | | | | | | | When expanding a BRCOND into a BR_CC, do not create an AND 1 if one already exists. Review: D36705 Patch by Joel Galenson <jgalenson@google.com> llvm-svn: 311447
* [SelectionDAG] Add getNode debug messagesSjoerd Meijer2017-08-221-8/+37
| | | | | | | | | | This adds debug messages to various functions that create new SDValue nodes. This is e.g. useful to have during legalization, as otherwise it can prints legalization info of nodes that did not appear in the dumps before. Differential Revision: https://reviews.llvm.org/D36984 llvm-svn: 311444
* [X86] Prevent several calls to ISD::isConstantSplatVector from returning a ↵Craig Topper2017-08-221-4/+7
| | | | | | | | | | | | | | narrower APInt than the original scalar type ISD::isConstantSplatVector can shrink to the smallest splat width. But we don't check the size of the resulting APInt at all. This can cause us to misinterpret the results. This patch just adds a flag to prevent the APInt from changing width. Fixes PR34271. Differential Revision: https://reviews.llvm.org/D36996 llvm-svn: 311429
* [RegAlloc] Make sure live-ranges reflect the state of the IR when removing themQuentin Colombet2017-08-212-2/+8
| | | | | | | | | | | When removing a live-range we used to not touch them making debug prints harder to read because the IR was not matching what the live-ranges information was saying. This only affects debug printing and allows to put stronger asserts in the code (see r308906 for instance). llvm-svn: 311401
* Move helper classes into anonymous namespaces.Benjamin Kramer2017-08-203-4/+8
| | | | | | No functionality change intended. llvm-svn: 311288
* [DAGCombiner] Extending pattern detection for vector shuffle.Jatin Bhateja2017-08-191-3/+53
| | | | | | | | | | | | | | | | Summary: If all the operands of a BUILD_VECTOR extract elements from same vector then split the vector efficiently based on the maximum vector access index. Reviewers: zvi, delena, RKSimon, thakis Reviewed By: RKSimon Subscribers: chandlerc, eladcohen, llvm-commits Differential Revision: https://reviews.llvm.org/D35788 llvm-svn: 311255
* Revert rL311247 : To rectify commit message.Jatin Bhateja2017-08-191-53/+3
| | | | | | | | Summary: This reverts commit rL311247. Differential Revision: https://reviews.llvm.org/D36927 llvm-svn: 311252
* Merge branch 'arcpatch-D35788'Jatin Bhateja2017-08-191-3/+53
| | | | llvm-svn: 311247
* Revert rL311242 "Extension of shuffle vector pattern detection, updating ↵Jatin Bhateja2017-08-191-46/+3
| | | | | | | | | | | | post rebase." Summary: This reverts commit rL311242. Differential Revision: https://reviews.llvm.org/D36924 llvm-svn: 311246
* Extension of shuffle vector pattern detection, updating post rebase.Jatin Bhateja2017-08-191-3/+46
| | | | llvm-svn: 311242
* Filter out non-constant DIGlobalVariableExpressions reachable via the CUAdrian Prantl2017-08-191-2/+9
| | | | | | | | | They won't affect the DWARF output, but they will mess with the sorting of the fragments. This fixes the crash reported in PR34159. https://bugs.llvm.org/show_bug.cgi?id=34159 llvm-svn: 311217
* [Debug info] Transfer DI to fragment expressions for split integer values.Jonas Devlieghere2017-08-183-16/+59
| | | | | | | | | | | This patch teaches the SDag type legalizer how to split up debug info for integer values that are split into a hi and lo part. (re-commit) Differential Revision: https://reviews.llvm.org/D36805 llvm-svn: 311181
* [DAGCombiner] Fix bad comment that had immediate values swapped from the ↵Craig Topper2017-08-181-1/+1
| | | | | | code and what they need to be to make sense. NFC llvm-svn: 311144
* Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" ↵Geoff Berry2017-08-183-577/+24
| | | | | | | | | | | round 2 This reverts commit r311135. sanitizer-x86_64-linux-android buildbot is timing out with just this patch applied. llvm-svn: 311142
* Increase tail dup threshold for -O3 from 3 to 4.Richard Smith2017-08-171-1/+1
| | | | | | | | We see a modest performance improvement from this slightly higher tail dup threshold. Differential Revision: https://reviews.llvm.org/D36775 llvm-svn: 311139
* Re-enable "[MachineCopyPropagation] Extend pass to do COPY source ↵Geoff Berry2017-08-173-24/+577
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | forwarding" Two issues identified by buildbots were addressed: - The pass no longer forwards COPYs to physical register uses, since doing so can break code that implicitly relies on the physical register number of the use. - The pass no longer forwards COPYs to undef uses, since doing so can break the machine verifier by creating LiveRanges that don't end on a use (since the undef operand is not considered a use). [MachineCopyPropagation] Extend pass to do COPY source forwarding This change extends MachineCopyPropagation to do COPY source forwarding. This change also extends the MachineCopyPropagation pass to be able to be run during register allocation, after physical registers have been assigned, but before the virtual registers have been re-written, which allows it to remove virtual register COPY LiveIntervals that become dead through the forwarding of all of their uses. Reviewers: qcolombet, javed.absar, MatzeB, jonpa Subscribers: jyknight, nemanjai, llvm-commits, nhaehnle, mcrosier, mgorny Differential Revision: https://reviews.llvm.org/D30751 llvm-svn: 311135
* [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-08-1716-220/+360
| | | | | | other minor fixes (NFC). llvm-svn: 311124
* Revert "[Debug info] Transfer DI to fragment expressions for split integer ↵Jonas Devlieghere2017-08-173-62/+19
| | | | | | | | values." This reverts commit r311102. llvm-svn: 311111
* [Debug info] Transfer DI to fragment expressions for split integer values.Jonas Devlieghere2017-08-173-19/+62
| | | | | | | | | This patch teaches the SDag type legalizer how to split up debug info for integer values that are split into a hi and lo part. Differential Revision: https://reviews.llvm.org/D36805 llvm-svn: 311102
* Improve line debug info when translating a CaseBlock to SDNodes.Adrian Prantl2017-08-172-9/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SelectionDAGBuilder translates various conditional branches into CaseBlocks which are then translated into SDNodes. If a conditional branch results in multiple CaseBlocks only the first CaseBlock is translated into SDNodes immediately, the rest of the CaseBlocks are put in a queue and processed when all LLVM IR instructions in the basic block have been processed. When a CaseBlock is transformed into SDNodes the SelectionDAGBuilder is queried for the current LLVM IR instruction and the resulting SDNodes are annotated with the debug info of the current instruction (if it exists and has debug metadata). When the deferred CaseBlocks are processed, the SelectionDAGBuilder does not have a current LLVM IR instruction, and the resulting SDNodes will not have any debuginfo. As DwarfDebug::beginInstruction() outputs a .loc directive for the first instruction in a labeled block (typically the case for something coming from a CaseBlock) this tends to produce a line-0 directive. This patch changes the handling of CaseBlocks to store the current instruction's debug info into the CaseBlock when it is created (and the SelectionDAGBuilder knows the current instruction) and to always use the stored debug info when translating a CaseBlock to SDNodes. Patch by Frej Drejhammar! Differential Revision: https://reviews.llvm.org/D36671 llvm-svn: 311097
* [DAGCombiner] Add support for non-uniform constant vectors to (mul x, (1 << ↵Simon Pilgrim2017-08-171-5/+9
| | | | | | c)) -> x << c llvm-svn: 311083
* [SystemZ, MachineScheduler] Improve post-RA scheduling.Jonas Paulsson2017-08-171-36/+84
| | | | | | | | | | | | | | | | | | | | | | The idea of this patch is to continue the scheduler state over an MBB boundary in the case where the successor block has only one predecessor. This means that the scheduler will continue in the successor block (after emitting any branch instructions) with e.g. maintained processor resource counters. Benchmarks have been confirmed to benefit from this. The algorithm in MachineScheduler.cpp that extracts scheduling regions of an MBB has been extended so that the strategy may optionally reverse the order of processing the regions themselves. This is controlled by a new method doMBBSchedRegionsTopDown(), which defaults to false. Handling the top-most region of an MBB first also means that a top-down scheduler can continue the scheduler state across any scheduling boundary between to regions inside MBB. Review: Ulrich Weigand, Matthias Braun, Andy Trick. https://reviews.llvm.org/D35053 llvm-svn: 311072
* [SelectionDAG] Teach the vector-types operand scalarizer about SETCCElad Cohen2017-08-172-0/+34
| | | | | | | | | | | | | | | | When v1i1 is legal (e.g. AVX512) the legalizer can reach a case where a v1i1 SETCC with an illgeal vector type operand wasn't scalarized (since v1i1 is legal) but its operands does have to be scalarized. This used to assert because SETCC was missing from the vector operand scalarizer. This patch attemps to teach the legalizer to handle these cases by scalazring the operands, converting the node into a scalar SETCC node. Differential revision: https://reviews.llvm.org/D36651 llvm-svn: 311071
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