summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* A simplification for checking whether the signs of the operands and sum ↵Bill Wendling2008-11-251-15/+14
| | | | | | differ. Thanks, Duncan. llvm-svn: 60043
* Suppress warnings.Dan Gohman2008-11-251-7/+7
| | | | llvm-svn: 60041
* Now with the correct type for the 0.Bill Wendling2008-11-251-1/+1
| | | | llvm-svn: 60016
* Get rid of unused variable.Bill Wendling2008-11-251-1/+0
| | | | llvm-svn: 60015
* Hacker's Delight says, "Signed integer overflow of addition occurs if and onlyBill Wendling2008-11-251-4/+48
| | | | | | | if the operands have the same sign and the sum has sign opposite to that of the operands." llvm-svn: 60014
* Initial support for anti-dependence breaking. Currently this code does notDan Gohman2008-11-253-261/+643
| | | | | | | | | introduce any new spilling; it just uses unused registers. Refactor the SUnit topological sort code out of the RRList scheduler and make use of it to help with the post-pass scheduler. llvm-svn: 59999
* - Make lowering of "add with overflow" customizable by back-ends.Bill Wendling2008-11-242-18/+29
| | | | | | | - Mark "add with overflow" as having a custom lowering for X86. Give it a null lowering representation for now. llvm-svn: 59971
* Check in the rest of this change. The isAntiDep flag needs to be passedDan Gohman2008-11-242-2/+2
| | | | | | | to removePred because an SUnit can both data-depend and anti-depend on the same SUnit. llvm-svn: 59969
* Pass the isAntiDep argument.Dan Gohman2008-11-241-1/+1
| | | | llvm-svn: 59968
* Run post-RA scheduling after branch folding, as it tends toDan Gohman2008-11-241-4/+7
| | | | | | obscure tail-merging opportunities. llvm-svn: 59967
* Minor fix debug for register allocation debug output.Matthijs Kooijman2008-11-242-4/+4
| | | | llvm-svn: 59961
* If the type legalizer actually legalized anythingDuncan Sands2008-11-244-195/+234
| | | | | | | | | | | | | (this doesn't happen that often, since most code does not use illegal types) then follow it by a DAG combiner run that is allowed to generate illegal operations but not illegal types. I didn't modify the target combiner code to distinguish like this between illegal operations and illegal types, so it will not produce illegal operations as well as not producing illegal types. llvm-svn: 59960
* Eliminate some unused variable compile time warnings.Evan Cheng2008-11-243-0/+9
| | | | llvm-svn: 59952
* Add support for llvm.uadd.with.overflow.Bill Wendling2008-11-241-5/+5
| | | | llvm-svn: 59926
* Rename SetCCResultContents to BooleanContents. InDuncan Sands2008-11-235-23/+23
| | | | | | | practice these booleans are mostly produced by SetCC, however the concept is more general. llvm-svn: 59911
* Added check to avoid generating extract subvector beyond the end of the ↵Mon P Wang2008-11-231-1/+2
| | | | | | vector when normalizing vector shuffles. llvm-svn: 59900
* Make a convenient helper for printing offsets.Anton Korobeynikov2008-11-221-0/+7
| | | | llvm-svn: 59872
* Cleanup of the [SU]ADDO type legalization code. Patch by Duncan!Bill Wendling2008-11-223-22/+24
| | | | | | | | | | "It simplifies the type legalization part a bit, and produces better code by teaching SelectionDAG about the extra bits in an i8 SADDO/UADDO node. In essence, I spontaneously decided that on x86 this i8 boolean result would be either 0 or 1, and on other platforms 0/1 or 0/-1, depending on whether the platform likes it's boolean zero extended or sign extended." llvm-svn: 59864
* - Move conversion of [SU]ADDO from DAG combiner into legalizer.Bill Wendling2008-11-224-38/+53
| | | | | | - Add "promote integer type" stuff to the legalizer for these nodes. llvm-svn: 59847
* Silence unused variable warnings.Devang Patel2008-11-213-0/+4
| | | | llvm-svn: 59841
* Correctly set the isCtrl flag for chain dependencies.Dan Gohman2008-11-211-4/+4
| | | | llvm-svn: 59837
* Update comments.Dan Gohman2008-11-211-9/+9
| | | | llvm-svn: 59836
* Update comments.Dan Gohman2008-11-211-3/+3
| | | | llvm-svn: 59834
* reapply Sanjiv's patch to genericize memcpy/memset/memmove to take anChris Lattner2008-11-212-18/+9
| | | | | | arbitrary integer width for the count. llvm-svn: 59823
* Revert r59802. It was breaking the build of llvm-gcc:Bill Wendling2008-11-212-9/+18
| | | | | | | | | | | | | | | | | | | | | g++ -m32 -c -g -DIN_GCC -W -Wall -Wwrite-strings -Wmissing-format-attribute -fno-common -mdynamic-no-pic -DHAVE_CONFIG_H -Wno-unused -DTARGET_NAME=\"i386-apple-darwin9.5.0\" -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DENABLE_LLVM -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/../llvm.src/include -D_DEBUG -D_GNU_SOURCE -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include ../../llvm-gcc.src/gcc/llvm-types.cpp -o llvm-types.o ../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemCpy(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)': ../../llvm-gcc.src/gcc/llvm-convert.cpp:1496: error: 'memcpy_i32' is not a member of 'llvm::Intrinsic' ../../llvm-gcc.src/gcc/llvm-convert.cpp:1496: error: 'memcpy_i64' is not a member of 'llvm::Intrinsic' ../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemMove(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)': ../../llvm-gcc.src/gcc/llvm-convert.cpp:1512: error: 'memmove_i32' is not a member of 'llvm::Intrinsic' ../../llvm-gcc.src/gcc/llvm-convert.cpp:1512: error: 'memmove_i64' is not a member of 'llvm::Intrinsic' ../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemSet(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)': ../../llvm-gcc.src/gcc/llvm-convert.cpp:1528: error: 'memset_i32' is not a member of 'llvm::Intrinsic' ../../llvm-gcc.src/gcc/llvm-convert.cpp:1528: error: 'memset_i64' is not a member of 'llvm::Intrinsic' make[3]: *** [llvm-convert.o] Error 1 make[3]: *** Waiting for unfinished jobs.... rm fsf-funding.pod gcov.pod gfdl.pod cpp.pod gpl.pod gcc.pod make[2]: *** [all-stage1-gcc] Error 2 make[1]: *** [stage1-bubble] Error 2 make: *** [all] Error 2 llvm-svn: 59809
* Make mem[cpy,move,set] intrinsics overloaded.Sanjiv Gupta2008-11-212-18/+9
| | | | llvm-svn: 59802
* Default to converting UADDO to the generic form that SADDO is converted to.Bill Wendling2008-11-211-1/+1
| | | | llvm-svn: 59801
* Clean up normalization of shufflesMon P Wang2008-11-211-30/+31
| | | | llvm-svn: 59792
* Combine the two add with overflow intrinsics lowerings. They differ only in ↵Bill Wendling2008-11-211-18/+5
| | | | | | DAG node type. llvm-svn: 59788
* Set the isAntiDep flag in the MachineInstr scheduler.Dan Gohman2008-11-211-1/+1
| | | | llvm-svn: 59787
* Generate code for llvm.uadd.with.overflow intrinsic. No conversion support yet.Bill Wendling2008-11-211-1/+12
| | | | llvm-svn: 59786
* Add a flag to SDep for tracking which edges are anti-dependence edges.Dan Gohman2008-11-212-8/+8
| | | | llvm-svn: 59785
* Remove chains. Unnecessary.Bill Wendling2008-11-212-14/+8
| | | | llvm-svn: 59783
* Rename SDep's isSpecial to isArtificial, to make this field a littleDan Gohman2008-11-214-43/+43
| | | | | | less mysterious. llvm-svn: 59782
* Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"Bill Wendling2008-11-213-7/+14
| | | | | | | because the boolean it returns to indicate an overflow may not be treated like as a flag. It could be stored to memory, for instance. llvm-svn: 59780
* Implement the sadd_with_overflow intrinsic. This is converted intoBill Wendling2008-11-213-2/+56
| | | | | | | | "ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the addition and then checks if the result is less than one of the operands. (If it is, then there was an overflow.) llvm-svn: 59779
* Use ComputeLatency in the MachineInstr scheduler.Dan Gohman2008-11-212-0/+4
| | | | llvm-svn: 59777
* Remove the CycleBound computation code from the ScheduleDAGRRListDan Gohman2008-11-211-58/+5
| | | | | | | | | | | | | schedulers. This doesn't have much immediate impact because targets that use these schedulers by default don't yet provide pipeline information. This code also didn't have the benefit of register pressure information. Also, removing it will avoid problems with list-burr suddenly starting to do latency-oriented scheduling on x86 when we start providing pipeline data, which would increase spilling. llvm-svn: 59775
* Implement ComputeLatency for MachineInstr ScheduleDAGs. FactorDan Gohman2008-11-212-8/+19
| | | | | | | | some of the latency computation logic out of the SDNode ScheduleDAG code into a TargetInstrItineraries helper method to help with this. llvm-svn: 59761
* Add UADDO and SADDO nodes. These will be used for determining an overflowBill Wendling2008-11-211-0/+2
| | | | | | condition in an addition operation. llvm-svn: 59760
* Change these schedulers to not emit no-ops. It turns out thatDan Gohman2008-11-212-9/+3
| | | | | | | | | the RR scheduler actually does look at latency values, but it doesn't use a hazard recognizer so it has no way to know when a no-op is needed, as opposed to just stalling and incrementing the cycle count. llvm-svn: 59759
* Treat mid-block labels the same as terminators when building theDan Gohman2008-11-201-1/+1
| | | | | | | | | | MachineInstr scheduling DAG, meaning they implicitly depend on all preceding defs. This fixes Benchmarks/Shootout-C++/except and Regression/C++/EH/simple_rethrow in -relocation-model=pic -disable-post-RA-scheduler=false mode. llvm-svn: 59747
* Add another machine-code printing pass when post-pass scheduling is run.Dan Gohman2008-11-201-1/+5
| | | | llvm-svn: 59746
* Add some documentation.Duncan Sands2008-11-201-1/+28
| | | | llvm-svn: 59727
* 80-column violation.Bill Wendling2008-11-201-2/+4
| | | | llvm-svn: 59718
* Remove a remnant of list-burr's fast mode.Dan Gohman2008-11-201-20/+0
| | | | llvm-svn: 59702
* Factor out the SethiUllman numbering logic from the list-burr andDan Gohman2008-11-201-159/+47
| | | | | | list-tdrr schedulers into a common base class. llvm-svn: 59701
* Remove the "fast" form of the list-burr scheduler, and use theDan Gohman2008-11-202-74/+15
| | | | | | | | | dedicated "fast" scheduler in -fast mode instead, which is faster. This speeds up llc -fast by a few percent on some testcases -- the speedup only happens for code not handled by fast-isel. llvm-svn: 59700
* Facter AddPseudoTwoAddrDeps and associated infrasructure out ofDan Gohman2008-11-201-43/+60
| | | | | | | the list-burr scheduler so that it can be used by the list-tdrr scheduler too. llvm-svn: 59698
* - Register scavenger should use MachineRegisterInfo and internal map to find ↵Evan Cheng2008-11-201-32/+62
| | | | | | | | | the first use of a register after a given machine instruction. - When scavenging a register, in addition to the spill, insert a restore before the first use. - Abort if client is looking to scavenge a register even when a previously scavenged register is still live. llvm-svn: 59697
OpenPOWER on IntegriCloud