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* If the live interval legnth is essentially zero, i.e. in every live rangeEvan Cheng2006-05-101-1/+15
| | | | | | | the use follows def immediately, it doesn't make sense to spill it and hope it will be easier to allocate for this LI. llvm-svn: 28217
* Templatify RegReductionPriorityQueueEvan Cheng2006-05-101-7/+12
| | | | llvm-svn: 28212
* Fix PR773Nate Begeman2006-05-091-2/+20
| | | | llvm-svn: 28207
* Fix a regression in my patch from last night that broke the llvmgcc4 build onChris Lattner2006-05-091-1/+1
| | | | | | ppc llvm-svn: 28205
* Add pseudo dependency to force a def&use operand to be scheduled last (unlessEvan Cheng2006-05-091-17/+108
| | | | | | | the distance between the def and another use is much longer). This is under option control for now "-sched-lower-defnuse". llvm-svn: 28201
* Debugging infoEvan Cheng2006-05-091-3/+3
| | | | llvm-svn: 28200
* PR 770 - permit coallescing of registers in subset register classes.Evan Cheng2006-05-091-13/+25
| | | | llvm-svn: 28197
* Implement MASM sections correctly, without a "has masm sections flag" and a ↵Chris Lattner2006-05-091-27/+17
| | | | | | bunch of special case code. llvm-svn: 28194
* Oh yeah, there are two of these now, unify both.Chris Lattner2006-05-091-22/+15
| | | | llvm-svn: 28192
* Setting SwitchToSectionDirective properly in the MASM backend permits a bunchChris Lattner2006-05-091-22/+15
| | | | | | of code to be unified. llvm-svn: 28191
* Don't prefix section directives with a tab. Doing so causes blank lines toChris Lattner2006-05-091-1/+1
| | | | | | be emitted to the .s file. llvm-svn: 28189
* Make the masm codepath work like the normal code path.Chris Lattner2006-05-091-2/+4
| | | | llvm-svn: 28188
* The MASM asmprinter has been fixed, these hacks are no longer needed.Chris Lattner2006-05-091-20/+2
| | | | llvm-svn: 28186
* Split SwitchSection into SwitchTo{Text|Data}Section methods.Chris Lattner2006-05-092-39/+81
| | | | llvm-svn: 28184
* Make the case I just checked in stronger. Now we compile this:Chris Lattner2006-05-081-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | short test2(short X, short x) { int Y = (short)(X+x); return Y >> 1; } to: _test2: add r2, r3, r4 extsh r2, r2 srawi r3, r2, 1 blr instead of: _test2: add r2, r3, r4 extsh r2, r2 srwi r2, r2, 1 extsh r3, r2 blr llvm-svn: 28175
* Implement and_sext.ll:test3, generating:Chris Lattner2006-05-081-1/+8
| | | | | | | | | | | | | | | | | | | | | _test4: srawi r3, r3, 16 blr instead of: _test4: srwi r2, r3, 16 extsh r3, r2 blr for: short test4(unsigned X) { return (X >> 16); } llvm-svn: 28174
* Compile this:Chris Lattner2006-05-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | short test4(unsigned X) { return (X >> 16); } to: _test4: movl 4(%esp), %eax sarl $16, %eax ret instead of: _test4: movl $-65536, %eax andl 4(%esp), %eax sarl $16, %eax ret llvm-svn: 28171
* Fold shifts with undef operands.Chris Lattner2006-05-081-0/+7
| | | | llvm-svn: 28167
* Make emission of jump tables a bit less conservative; they are now requiredNate Begeman2006-05-081-4/+4
| | | | | | to be only 31.25% dense, rather than 75% dense. llvm-svn: 28165
* Fix PR772Nate Begeman2006-05-081-9/+9
| | | | llvm-svn: 28161
* Simplify some code, add a couple minor missed foldsChris Lattner2006-05-061-21/+16
| | | | llvm-svn: 28152
* constant fold sign_extend_inregChris Lattner2006-05-061-1/+9
| | | | llvm-svn: 28151
* remove cases handled elsewhereChris Lattner2006-05-061-16/+2
| | | | llvm-svn: 28150
* Fix some loose ends in MASM support.Jeff Cohen2006-05-061-5/+5
| | | | llvm-svn: 28148
* Use the new TargetLowering::ComputeNumSignBits method to eliminateChris Lattner2006-05-061-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sign_extend_inreg operations. Though ComputeNumSignBits is still rudimentary, this is enough to compile this: short test(short X, short x) { int Y = X+x; return (Y >> 1); } short test2(short X, short x) { int Y = (short)(X+x); return Y >> 1; } into: _test: add r2, r3, r4 srawi r3, r2, 1 blr _test2: add r2, r3, r4 extsh r2, r2 srawi r3, r2, 1 blr instead of: _test: add r2, r3, r4 srawi r2, r2, 1 extsh r3, r2 blr _test2: add r2, r3, r4 extsh r2, r2 srawi r2, r2, 1 extsh r3, r2 blr llvm-svn: 28146
* When inserting casts, be careful of where we put them. We cannot insertChris Lattner2006-05-061-9/+12
| | | | | | | | a cast immediately before a PHI node. This fixes Regression/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll llvm-svn: 28143
* Fold trunc(any_ext). This gives stuff like:Chris Lattner2006-05-051-1/+2
| | | | | | | | | | 27,28c27 < movzwl %di, %edi < movl %edi, %ebx --- > movw %di, %bx llvm-svn: 28137
* Shrink shifts when possible.Chris Lattner2006-05-051-0/+12
| | | | llvm-svn: 28136
* Indent multiline asm strings more nicelyChris Lattner2006-05-051-5/+9
| | | | llvm-svn: 28132
* Fold (fpext (load x)) -> (extload x)Chris Lattner2006-05-051-0/+14
| | | | llvm-svn: 28130
* More aggressively sink GEP offsets into loops. For example, before weChris Lattner2006-05-051-56/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | generated: movl 8(%esp), %eax movl %eax, %edx addl $4316, %edx cmpb $1, %cl ja LBB1_2 #cond_false LBB1_1: #cond_true movl L_QuantizationTables720$non_lazy_ptr, %ecx movl %ecx, (%edx) movl L_QNOtoQuantTableShift720$non_lazy_ptr, %edx movl %edx, 4460(%eax) ret ... Now we generate: movl 8(%esp), %eax cmpb $1, %cl ja LBB1_2 #cond_false LBB1_1: #cond_true movl L_QuantizationTables720$non_lazy_ptr, %ecx movl %ecx, 4316(%eax) movl L_QNOtoQuantTableShift720$non_lazy_ptr, %ecx movl %ecx, 4460(%eax) ret ... which uses one fewer register. llvm-svn: 28129
* Fold some common code.Chris Lattner2006-05-051-14/+2
| | | | llvm-svn: 28124
* Implement:Chris Lattner2006-05-051-5/+7
| | | | | | | | | | | // fold (and (sext x), (sext y)) -> (sext (and x, y)) // fold (or (sext x), (sext y)) -> (sext (or x, y)) // fold (xor (sext x), (sext y)) -> (sext (xor x, y)) // fold (and (aext x), (aext y)) -> (aext (and x, y)) // fold (or (aext x), (aext y)) -> (aext (or x, y)) // fold (xor (aext x), (aext y)) -> (aext (xor x, y)) llvm-svn: 28123
* Pull and through and/or/xor. This compiles some bitfield code to:Chris Lattner2006-05-051-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mov EAX, DWORD PTR [ESP + 4] mov ECX, DWORD PTR [EAX] mov EDX, ECX add EDX, EDX or EDX, ECX and EDX, -2147483648 and ECX, 2147483647 or EDX, ECX mov DWORD PTR [EAX], EDX ret instead of: sub ESP, 4 mov DWORD PTR [ESP], ESI mov EAX, DWORD PTR [ESP + 8] mov ECX, DWORD PTR [EAX] mov EDX, ECX add EDX, EDX mov ESI, ECX and ESI, -2147483648 and EDX, -2147483648 or EDX, ESI and ECX, 2147483647 or EDX, ECX mov DWORD PTR [EAX], EDX mov ESI, DWORD PTR [ESP] add ESP, 4 ret llvm-svn: 28122
* Implement a variety of simplifications for ANY_EXTEND.Chris Lattner2006-05-051-0/+51
| | | | llvm-svn: 28121
* Factor some code, add these transformations:Chris Lattner2006-05-051-55/+66
| | | | | | | | // fold (and (trunc x), (trunc y)) -> (trunc (and x, y)) // fold (or (trunc x), (trunc y)) -> (trunc (or x, y)) // fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y)) llvm-svn: 28120
* Fix VC++ compilation error.Jeff Cohen2006-05-051-1/+1
| | | | llvm-svn: 28117
* Sink noop copies into the basic block that uses them. This reduces the numberChris Lattner2006-05-051-4/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of cross-block live ranges, and allows the bb-at-a-time selector to always coallesce these away, at isel time. This reduces the load on the coallescer and register allocator. For example on a codec on X86, we went from: 1643 asm-printer - Number of machine instrs printed 419 liveintervals - Number of loads/stores folded into instructions 1144 liveintervals - Number of identity moves eliminated after coalescing 1022 liveintervals - Number of interval joins performed 282 liveintervals - Number of intervals after coalescing 1304 liveintervals - Number of original intervals 86 regalloc - Number of times we had to backtrack 1.90232 regalloc - Ratio of intervals processed over total intervals 40 spiller - Number of values reused 182 spiller - Number of loads added 121 spiller - Number of stores added 132 spiller - Number of register spills 6 twoaddressinstruction - Number of instructions commuted to coalesce 360 twoaddressinstruction - Number of two-address instructions to: 1636 asm-printer - Number of machine instrs printed 403 liveintervals - Number of loads/stores folded into instructions 1155 liveintervals - Number of identity moves eliminated after coalescing 1033 liveintervals - Number of interval joins performed 279 liveintervals - Number of intervals after coalescing 1312 liveintervals - Number of original intervals 76 regalloc - Number of times we had to backtrack 1.88998 regalloc - Ratio of intervals processed over total intervals 1 spiller - Number of copies elided 41 spiller - Number of values reused 191 spiller - Number of loads added 114 spiller - Number of stores added 128 spiller - Number of register spills 4 twoaddressinstruction - Number of instructions commuted to coalesce 356 twoaddressinstruction - Number of two-address instructions On this testcase, this change provides a modest reduction in spill code, regalloc iterations, and total instructions emitted. It increases the number of register coallesces. llvm-svn: 28115
* Final pass of minor cleanups for MachineInstrChris Lattner2006-05-041-4/+0
| | | | llvm-svn: 28110
* Initial support for register pressure aware scheduling. The register reductionEvan Cheng2006-05-041-50/+238
| | | | | | | | | | scheduler can go into a "vertical mode" (i.e. traversing up the two-address chain, etc.) when the register pressure is low. This does seem to reduce the number of spills in the cases I've looked at. But with x86, it's no guarantee the performance of the code improves. It can be turned on with -sched-vertically option. llvm-svn: 28108
* Remove redundancy and a level of indirection when creating machine operandsChris Lattner2006-05-041-21/+5
| | | | llvm-svn: 28107
* Remove and simplify some more machineinstr/machineoperand stuff.Chris Lattner2006-05-043-3/+3
| | | | llvm-svn: 28105
* Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.Chris Lattner2006-05-042-5/+5
| | | | llvm-svn: 28104
* Move some methods out of MachineInstr into MachineOperandChris Lattner2006-05-046-35/+16
| | | | llvm-svn: 28102
* There shalt be only one "immediate" operand type!Chris Lattner2006-05-041-8/+2
| | | | llvm-svn: 28099
* Change "value" in MachineOperand to be a GlobalValue, as that is the onlyChris Lattner2006-05-041-14/+3
| | | | | | thing that can be in it. Remove a dead method. llvm-svn: 28098
* Remove a bunch more dead V9 specific stuffChris Lattner2006-05-043-34/+9
| | | | llvm-svn: 28094
* Remove a bunch more SparcV9 specific stuffChris Lattner2006-05-042-12/+6
| | | | llvm-svn: 28093
* Remove some more V9-specific stuff.Chris Lattner2006-05-041-32/+2
| | | | llvm-svn: 28092
* Remove some more unused stuff from MachineInstr that was leftover from V9.Chris Lattner2006-05-041-38/+0
| | | | llvm-svn: 28091
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