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| author | Chris Lattner <sabre@nondot.org> | 2006-05-05 22:53:17 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-05-05 22:53:17 +0000 |
| commit | 57f8c5a3874f6062f17e7c7e8f602ea042acb159 (patch) | |
| tree | 851fa407c967ddc412bf88d10430570e170b7c56 /llvm/lib/CodeGen | |
| parent | 0f64932a5c2c65fb9d6aa2ce488c282bb7a73cb5 (diff) | |
| download | bcm5719-llvm-57f8c5a3874f6062f17e7c7e8f602ea042acb159.tar.gz bcm5719-llvm-57f8c5a3874f6062f17e7c7e8f602ea042acb159.zip | |
Shrink shifts when possible.
llvm-svn: 28136
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 872242e46fc..1175f527acb 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1615,6 +1615,18 @@ SDOperand DAGCombiner::visitSRL(SDNode *N) { DAG.getConstant(c1 + c2, N1.getValueType())); } + // fold (srl (anyextend x), c) -> (anyextend (srl x, c)) + if (N1C && N0.getOpcode() == ISD::ANY_EXTEND) { + // Shifting in all undef bits? + MVT::ValueType SmallVT = N0.getOperand(0).getValueType(); + if (N1C->getValue() >= MVT::getSizeInBits(SmallVT)) + return DAG.getNode(ISD::UNDEF, VT); + + SDOperand SmallShift = DAG.getNode(ISD::SRL, SmallVT, N0.getOperand(0), N1); + AddToWorkList(SmallShift.Val); + return DAG.getNode(ISD::ANY_EXTEND, VT, SmallShift); + } + // fold (srl (ctlz x), "5") -> x iff x has one bit set (the low bit). if (N1C && N0.getOpcode() == ISD::CTLZ && N1C->getValue() == Log2_32(MVT::getSizeInBits(VT))) { |
