| Commit message (Collapse) | Author | Age | Files | Lines |
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the input is that type, this caused a failure on gs on X86 last night.
Move the hard checks into Build[US]Div since that is where decisions like
this should be made.
llvm-svn: 23881
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2005-10-21-longlonggtu.ll.
llvm-svn: 23875
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For example, we can now join things like [0-30:0)[31-40:1)[52-59:2)
with [40:60:0) if the 52-59 range is defined by a copy from the 40-60 range.
The resultant range ends up being [0-30:0)[31-60:1).
This fires a lot through-out the test suite (e.g. shrinking bc from
19492 -> 18509 machineinstrs) though most gains are smaller (e.g. about
50 copies eliminated from crafty).
llvm-svn: 23866
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(an unused method).
Fix the merger so that it can merge ranges like this [10:12)[16:40) with
[12:38) into [10:40) instead of bogus ranges. This sort of input will be
possible for the merger coming shortly
llvm-svn: 23865
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llvm-svn: 23856
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Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
llvm-svn: 23853
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Andrew for bringing this to my attn.
llvm-svn: 23850
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for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.
llvm-svn: 23846
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llvm-svn: 23845
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llvm-svn: 23844
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Fix a *bug* in the extendIntervalEndTo method. In particular, if adding
[2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30).
Which is not the most smart thing to do. Now produce [0:30).
llvm-svn: 23841
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llvm-svn: 23839
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that the nodes can be folded with other nodes, and we can not duplicate
code in every backend. Alpha will probably want this too.
llvm-svn: 23835
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the pair of elements is a legal type.
llvm-svn: 23804
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allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).
llvm-svn: 23802
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sized stack object if either the array size or the type size is zero.
llvm-svn: 23801
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llvm-svn: 23797
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a lot throughout many programs. In particular, specfp triggers it a bunch for
constant FP nodes when you have code like cond ? 1.0 : -1.0.
If the PPC ISel exposed the loads implicit in pic references to external globals,
we would be able to eliminate a load in cases like this as well:
%X = external global int
%Y = external global int
int* %test4(bool %C) {
%G = select bool %C, int* %X, int* %Y
ret int* %G
}
Note that this breaks things that use SrcValue's (see the fixme), but since nothing
uses them yet, this is ok.
Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly.
llvm-svn: 23781
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llvm-svn: 23777
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llvm-svn: 23776
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llvm-svn: 23774
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llvm-svn: 23764
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llvm-svn: 23756
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CodeGen/PowerPC/rlwinm.ll:test3
llvm-svn: 23755
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fixes a legalize failure on SPASS for itanium.
llvm-svn: 23747
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popping up in Fourinarow.
llvm-svn: 23722
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you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.
Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants. Woot!
llvm-svn: 23720
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llvm-svn: 23718
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llvm-svn: 23717
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is also legal. Add support for ExpandOp'ing raw EXTLOADs too.
llvm-svn: 23716
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llvm-svn: 23715
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the remainder of the failures introduced by my patch last night.
llvm-svn: 23714
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tests.
llvm-svn: 23713
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parts. This should fix the crafty and signed long long unit test failure
on x86 last night.
llvm-svn: 23711
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minimize unnecessary spilling.
llvm-svn: 23710
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Kill some dead code.
llvm-svn: 23706
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out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.
Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.
llvm-svn: 23704
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like turning:
_foo:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
into
_foo:
fctiwz f0,f1
stfd f0,-8(r1)
lhz r3,-2(r1)
blr
Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.
llvm-svn: 23703
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llvm-svn: 23702
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llvm-svn: 23700
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llvm-svn: 23694
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llvm-svn: 23693
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llvm-svn: 23692
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location, replace them with a new store of the last value. This occurs
in the same neighborhood in 197.parser, speeding it up about 1.5%
llvm-svn: 23691
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multiple results.
Use this support to implement trivial store->load forwarding, implementing
CodeGen/PowerPC/store-load-fwd.ll. Though this is the most simple case and
can be extended in the future, it is still useful. For example, it speeds
up 197.parser by 6.2% by avoiding an LSU reject in xalloc:
stw r6, lo16(l5_end_of_array)(r2)
addi r2, r5, -4
stwx r5, r4, r2
- lwzx r5, r4, r2
- rlwinm r5, r5, 0, 0, 30
stwx r5, r4, r2
lwz r2, -4(r4)
ori r2, r2, 1
llvm-svn: 23690
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sext_inreg into zext_inreg based on the signbit (fires a lot), srem into
urem, etc.
llvm-svn: 23688
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llvm-svn: 23686
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llvm-svn: 23685
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llvm-svn: 23684
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removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp.
llvm-svn: 23682
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