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authorNate Begeman <natebegeman@mac.com>2005-10-21 01:51:45 +0000
committerNate Begeman <natebegeman@mac.com>2005-10-21 01:51:45 +0000
commit8f62cd32ad26b345572dda2bd85b160756ae6b59 (patch)
treef375eee3cb8764b204b25193181b960ef1f7c4ca /llvm/lib/CodeGen
parenta099c0131e279c8567a5c0d2876536bcfeee331a (diff)
downloadbcm5719-llvm-8f62cd32ad26b345572dda2bd85b160756ae6b59.tar.gz
bcm5719-llvm-8f62cd32ad26b345572dda2bd85b160756ae6b59.zip
Fix a typo in the dag combiner, so that this can work on i64 targets
llvm-svn: 23856
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 6c1d22c2bab..b523bce339a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2607,9 +2607,8 @@ SDOperand DAGCombiner::BuildSDIV(SDNode *N) {
}
// Extract the sign bit and add it to the quotient
SDOperand T =
- DAG.getNode(ISD::SRL, MVT::i32, Q,
- DAG.getConstant(MVT::getSizeInBits(VT)-1,
- TLI.getShiftAmountTy()));
+ DAG.getNode(ISD::SRL, VT, Q, DAG.getConstant(MVT::getSizeInBits(VT)-1,
+ TLI.getShiftAmountTy()));
WorkList.push_back(T.Val);
return DAG.getNode(ISD::ADD, VT, Q, T);
}
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