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* Use reserve() to avoid vector reallocation.Jakub Staszak2012-11-141-0/+1
| | | | llvm-svn: 167991
* canJoinPhys method doesn't modify CoalescerPair. Make it const.Jakub Staszak2012-11-141-2/+2
| | | | llvm-svn: 167972
* Remove dead code.Chad Rosier2012-11-141-13/+0
| | | | llvm-svn: 167970
* Fix really stupid ARM EHABI info generation bug: we should not emitAnton Korobeynikov2012-11-141-11/+14
| | | | | | | eh table and handler data if there are no landing pads in the function. Patch by Logan Chien with some cleanups from me. llvm-svn: 167945
* Add newlines to end of debug messages.Craig Topper2012-11-141-6/+6
| | | | llvm-svn: 167913
* Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.Rafael Espindola2012-11-141-1/+12
| | | | llvm-svn: 167912
* Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov2012-11-143-45/+39
| | | | | | | | Do some cleanup of the code while here. Inspired by patch by Logan Chien! llvm-svn: 167904
* Revert "Use the 'count' attribute instead of the 'upper_bound' attribute."Eric Christopher2012-11-131-2/+1
| | | | | | | | temporarily as it is breaking the gdb bots. This reverts commit r167806/e7ff4c14b157746b3e0228d2dce9f70712d1c126. llvm-svn: 167886
* Revert -join-splitedges to a boolean cmd line option.Andrew Trick2012-11-131-3/+2
| | | | llvm-svn: 167880
* The MachineScheduler does not currently require JoinSplitEdges.Andrew Trick2012-11-131-4/+4
| | | | | | | This option will eventually either be enabled unconditionally or replaced by a more general live range splitting optimization. llvm-svn: 167879
* [MC][COFF] Emit weak symbols to the correct section. Patch by Dmitry Puzirev!Michael J. Spencer2012-11-131-2/+13
| | | | llvm-svn: 167877
* Do not consider a machine instruction that uses and defines the sameUlrich Weigand2012-11-131-16/+44
| | | | | | | | | | physical register as candidate for common subexpression elimination in MachineCSE. This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc caused by MachineCSE invalidly merging two separate DYNALLOC insns. llvm-svn: 167855
* Fix -join-splitedges: my previous "cleanup" broke it.Andrew Trick2012-11-131-1/+1
| | | | | | | Working on reducing unit tests. This won't be enabled unless a subtarget enables misched. llvm-svn: 167851
* Codegen support for arbitrary vector getelementptrs.Duncan Sands2012-11-131-3/+3
| | | | llvm-svn: 167830
* misched: Allow subtargets to enable misched and dependent options.Andrew Trick2012-11-134-14/+43
| | | | | | | | | | | | This allows me to begin enabling (or backing out) misched by default for one subtarget at a time. To run misched we typically want to: - Disable SelectionDAG scheduling (use the source order scheduler) - Enable more aggressive coalescing (until we decide to always run the coalescer this way) - Enable MachineScheduler pass itself. Disabling PostRA sched may follow for some subtargets. llvm-svn: 167826
* Added RegisterCoalescer support for joining global copies first.Andrew Trick2012-11-131-20/+80
| | | | | | | | | | | | This adds the -join-globalcopies option which can be enabled by default once misched is also enabled. Ideally, the register coalescer would be able to split local live ranges in a way that produces copies that can be easily resolved by the scheduler. Until then, this heuristic should be good enough to at least allow the scheduler to run after coalescing. llvm-svn: 167825
* misched: Don't consider artificial edges weak edges.Andrew Trick2012-11-132-9/+5
| | | | | | | For now be more conservative in case other out-of-tree schedulers rely on the old behavior of artificial edges. llvm-svn: 167808
* Use the 'count' attribute instead of the 'upper_bound' attribute.Bill Wendling2012-11-131-1/+2
| | | | | | | | | If we have a type 'int a[1]' and a type 'int b[0]', the generated DWARF is the same for both of them because we use the 'upper_bound' attribute. Instead use the 'count' attrbute, which gives the correct number of elements in the array. <rdar://problem/12566646> llvm-svn: 167806
* Cleanup the main RegisterCoalescer loop.Andrew Trick2012-11-131-23/+10
| | | | | | Block priorities still apply outside loops. llvm-svn: 167793
* Cleanup -join-splitedges. Make the loop more obvious.Andrew Trick2012-11-121-5/+2
| | | | llvm-svn: 167785
* Add an option to enable prototype "fission" capabilities and debug changes.Eric Christopher2012-11-122-0/+16
| | | | llvm-svn: 167765
* Added a temporary option to avoid critical edges splitting.Andrew Trick2012-11-121-16/+55
| | | | | | | | | This teaches the register coalescer to be less prone to split critical edges. I am currently benchmarking this with the new (post-coalescer) scheduler. I plan to enable this by default and remove the option as soon as misched is enabled. llvm-svn: 167758
* misched: rename interfaceto avoid gcc warningsAndrew Trick2012-11-121-2/+1
| | | | llvm-svn: 167753
* misched: Target-independent support for MacroFusion.Andrew Trick2012-11-121-5/+61
| | | | | | | | | Uses the infrastructure from r167742 to support clustering instructure that the target processor can "fuse". e.g. cmp+jmp. Next step: target hook implementations with test cases, and enable. llvm-svn: 167744
* misched: Target-independent support for load/store clustering.Andrew Trick2012-11-121-12/+176
| | | | | | | | | | This infrastructure is generally useful for any target that wants to strongly prefer two instructions to be adjacent after scheduling. A following checkin will add target-specific hooks with unit tests. Then this feature will be enabled by default with misched. llvm-svn: 167742
* misched: Infrastructure for weak DAG edges.Andrew Trick2012-11-126-45/+100
| | | | | | | | This adds support for weak DAG edges to the general scheduling infrastructure in preparation for MachineScheduler support for heuristics based on weak edges. llvm-svn: 167738
* Fix assertions in updateRegMaskSlots().Jakob Stoklund Olesen2012-11-091-4/+14
| | | | | | | | | The RegMaskSlots contains 'r' slots while NewIdx and OldIdx are 'B' slots. This broke the checks in the assertions. This fixes PR14302. llvm-svn: 167625
* Silence GCC warning about falling off the end of a non-void function.Benjamin Kramer2012-11-091-0/+1
| | | | llvm-svn: 167618
* misched: Heuristics based on the machine model.Andrew Trick2012-11-071-146/+762
| | | | | | | | | | | | | | misched is disabled by default. With -enable-misched, these heuristics balance the schedule to simultaneously avoid saturating processor resources, expose ILP, and minimize register pressure. I've been analyzing the performance of these heuristics on everything in the llvm test suite in addition to a few other benchmarks. I would like each heuristic check to be verified by a unit test, but I'm still trying to figure out the best way to do that. The heuristics are still in considerable flux, but as they are refined we should be rigorous about unit testing the improvements. llvm-svn: 167527
* misched: handle on-the-fly regpressure queries better for 2-addrAndrew Trick2012-11-071-8/+13
| | | | | | instructions without relying on liveintervals. llvm-svn: 167526
* Add comment describing what's going on here.Bill Wendling2012-11-071-1/+4
| | | | llvm-svn: 167525
* When we're updating the subprogram scope DIE, we want to determine if we'reBill Wendling2012-11-071-36/+37
| | | | | | | | | | updating an abstract DIE or not. If we are, then we use that. Its children will be added on later, as well as the object pointer attribute. Otherwise, this function may be called with a concrete DIE twice and adding the children and object pointer attribute to it twice. <rdar://problem/12401423&12600340> llvm-svn: 167524
* [regallocfast] Make sure the MachineRegisterInfo is aware of clobbers from aChad Rosier2012-11-061-0/+5
| | | | | | | register masks. This is an obvious and necessary fix for a soon to be committed patch. No test case possible at this time. Reviewed by Jakob. llvm-svn: 167498
* misched: TargetSchedule interface for machine resources.Andrew Trick2012-11-061-4/+35
| | | | | | | | | | | Expose the processor resources defined by the machine model to the scheduler and other clients through the TargetSchedule interface. Normalize each resource count with respect to other kinds of resources. This allows scheduling heuristics to balance resources against other kinds of resources and latency. llvm-svn: 167444
* misched: Rename RemainingCount to avoid confusion with remaining resources.Andrew Trick2012-11-061-6/+6
| | | | llvm-svn: 167443
* ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.Andrew Trick2012-11-064-62/+63
| | | | | | | This is in preparation for adding "weak" DAG edges, but generally simplifies the design. llvm-svn: 167435
* Be careful not to optimize a SELECT_CC into a SETCC post-legalization if the ↵Owen Anderson2012-11-031-23/+27
| | | | | | SETCC node would be illegal. llvm-svn: 167344
* OutputArg: added an index of the original argument to match the change toManman Ren2012-11-012-3/+4
| | | | | | | | | | InputArg in r165616. This will enable us to get the actual type for both InputArg and OutputArg. rdar://9932559 llvm-svn: 167265
* Revert the majority of the next patch in the address space series:Chandler Carruth2012-11-019-29/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r165941: Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis. Despite this commit log, this change primarily changed stuff outside of VMCore, and those changes do not carry any tests for correctness (or even plausibility), and we have consistently found questionable or flat out incorrect cases in these changes. Most of them are probably correct, but we need to devise a system that makes it more clear when we have handled the address space concerns correctly, and ideally each pass that gets updated would receive an accompanying test case that exercises that pass specificaly w.r.t. alternate address spaces. However, from this commit, I have retained the new C API entry points. Those were an orthogonal change that probably should have been split apart, but they seem entirely good. In several places the changes were very obvious cleanups with no actual multiple address space code added; these I have not reverted when I spotted them. In a few other places there were merge conflicts due to a cleaner solution being implemented later, often not using address spaces at all. In those cases, I've preserved the new code which isn't address space dependent. This is part of my ongoing effort to clean out the partial address space code which carries high risk and low test coverage, and not likely to be finished before the 3.2 release looms closer. Duncan and I would both like to see the above issues addressed before we return to these changes. llvm-svn: 167222
* Revert the series of commits starting with r166578 which introduced theChandler Carruth2012-11-014-19/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | getIntPtrType support for multiple address spaces via a pointer type, and also introduced a crasher bug in the constant folder reported in PR14233. These commits also contained several problems that should really be addressed before they are re-committed. I have avoided reverting various cleanups to the DataLayout APIs that are reasonable to have moving forward in order to reduce the amount of churn, and minimize the number of commits that were reverted. I've also manually updated merge conflicts and manually arranged for the getIntPtrType function to stay in DataLayout and to be defined in a plausible way after this revert. Thanks to Duncan for working through this exact strategy with me, and Nick Lewycky for tracking down the really annoying crasher this triggered. (Test case to follow in its own commit.) After discussing with Duncan extensively, and based on a note from Micah, I'm going to continue to back out some more of the more problematic patches in this series in order to ensure we go into the LLVM 3.2 branch with a reasonable story here. I'll send a note to llvmdev explaining what's going on and why. Summary of reverted revisions: r166634: Fix a compiler warning with an unused variable. r166607: Add some cleanup to the DataLayout changes requested by Chandler. r166596: Revert "Back out r166591, not sure why this made it through since I cancelled the command. Bleh, sorry about this! r166591: Delete a directory that wasn't supposed to be checked in yet. r166578: Add in support for getIntPtrType to get the pointer type based on the address space. llvm-svn: 167221
* Add a few more simple fast-math constant propagations and cancellations.Owen Anderson2012-11-011-0/+18
| | | | llvm-svn: 167200
* Exploit the new identity composition in composeSubRegIndices().Jakob Stoklund Olesen2012-11-011-12/+8
| | | | | | | The static compose() function in RegisterCoalescer was doing the exact same thing. llvm-svn: 167198
* Replace some instances of UniqueVector with SetVector, which is slightly ↵Benjamin Kramer2012-10-312-5/+5
| | | | | | | | cheaper. No functionality change. llvm-svn: 167116
* Change signature of function RAFast::spillAll to avoid conversion betweenAkira Hatanaka2012-10-311-2/+2
| | | | | | type MachineInstr* and MachineBasicBlock::iterator. llvm-svn: 167088
* Check that iterator I is not the end iterator.Akira Hatanaka2012-10-311-2/+3
| | | | llvm-svn: 167086
* [inline asm] Get the mayLoad/mayStore directly from the MIOp_ExtraInfo operand.Chad Rosier2012-10-301-8/+2
| | | | llvm-svn: 167050
* Add a comment for r167040.Chad Rosier2012-10-301-0/+4
| | | | llvm-svn: 167046
* [inline asm] Implement mayLoad and mayStore for inline assembly. In general,Chad Rosier2012-10-304-8/+29
| | | | | | | | | | the MachineInstr MayLoad/MayLoad flags are based on the tablegen implementation. For inline assembly, however, we need to compute these based on the constraints. Revert r166929 as this is no longer needed, but leave the test case in place. rdar://12033048 and PR13504 llvm-svn: 167040
* Fix grammar.Bill Wendling2012-10-301-2/+2
| | | | llvm-svn: 167029
* In various places throughout the code generator, there were specialUlrich Weigand2012-10-292-83/+66
| | | | | | | | | checks to avoid performing compile-time arithmetic on PPCDoubleDouble. Now that APFloat supports arithmetic on PPCDoubleDouble, those checks are no longer needed, and we can treat the type like any other. llvm-svn: 166958
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