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* Rename virtual table anchors from Anchor() to anchor() for consistency with ↵Craig Topper2012-09-261-2/+2
| | | | | | the rest of the tree. llvm-svn: 164666
* Generate an error message instead of asserting or segfaulting when we have aBill Wendling2012-09-261-19/+29
| | | | | | | | scalar-to-vector conversion that we cannot handle. For instance, when an invalid constraint is used in an inline asm statement. <rdar://problem/12284092> llvm-svn: 164662
* Generate an error message instead of asserting or segfaulting when we have aBill Wendling2012-09-261-29/+41
| | | | | | | | scalar-to-vector conversion that we cannot handle. For instance, when an invalid constraint is used in an inline asm statement. <rdar://problem/12284092> llvm-svn: 164657
* TargetLowering interface to set/get minimum block entries for jump tables.Sebastian Pop2012-09-252-2/+4
| | | | | | | | | | | | | | Provide interface in TargetLowering to set or get the minimum number of basic blocks whereby jump tables are generated for switch statements rather than an if sequence. getMinimumJumpTableEntries() defaults to 4. setMinimumJumpTableEntries() allows target configuration. This patch changes the default for the Hexagon architecture to 5 as it improves performance on some benchmarks. llvm-svn: 164628
* Mark jump tables in code sections with DataRegion directives.Jim Grosbach2012-09-241-0/+7
| | | | | | | | | Even out-of-line jump tables can be in the code section, so mark them as data-regions for those targets which support the directives. rdar://12362871&12362974 llvm-svn: 164571
* Have the DbgVariable "isArtificial" and "isObjectPointer" notEric Christopher2012-09-212-5/+5
| | | | | | | | | | | | care about it being an argument variable so that we can decide that captured block and lambda vars that don't happen to be arguments could be an argument pointer. Add the object pointer for one case onto the subprogram die. rdar://12001329 llvm-svn: 164419
* Fix a significant recent(?) regression. StackSlotColoring no longer did anythingEvan Cheng2012-09-214-3/+10
| | | | | | | | | because LiveStackAnalysis was not preserved by VirtRegWriter. This caused big stack usage regression in some cases. rdar://12340383 llvm-svn: 164408
* Make the 'get*AlignmentFromAttr' functions into member functions within the ↵Bill Wendling2012-09-211-2/+2
| | | | | | Attributes class. Now with fix. llvm-svn: 164370
* Ignore PHI-defs for -new-coalescer interference checks.Jakob Stoklund Olesen2012-09-201-4/+8
| | | | | | | | A PHI can't create interference on its own. If two live ranges interfere at a PHI, they must also interfere when leaving one of the PHI predecessors. llvm-svn: 164330
* Extend -new-coalescer SSA update to handle mapped values as well.Jakob Stoklund Olesen2012-09-202-9/+62
| | | | | | | | | | | | | The old-fashioned many-to-one value mapping doesn't always work when merging vector lanes. A value can map to multiple different values, and it can even be necessary to insert new PHIs. When a value number is defined by a copy from a value number that required SSa update, include the live range of the copied value number in the SSA update as well. It is not necessarily a copy of the original value number any longer. llvm-svn: 164329
* Only emit DW_AT_object_pointer if this is a definition.Eric Christopher2012-09-201-3/+0
| | | | llvm-svn: 164326
* Revert r164308 to fix buildbots.Bill Wendling2012-09-201-2/+2
| | | | llvm-svn: 164309
* Make the 'get*AlignmentFromAttr' functions into member functions within the ↵Bill Wendling2012-09-201-2/+2
| | | | | | Attributes class. llvm-svn: 164308
* Fix 80-col violations.Nadav Rotem2012-09-201-13/+19
| | | | llvm-svn: 164297
* Convert some attribute existence queries over to use the predicate methods.Bill Wendling2012-09-191-2/+2
| | | | llvm-svn: 164268
* Add predicates for queries on whether an attribute exists.Bill Wendling2012-09-191-7/+6
| | | | llvm-svn: 164264
* Resolve conflicts involving dead vector lanes for -new-coalescer.Jakob Stoklund Olesen2012-09-191-9/+155
| | | | | | | | | | | | | | | | | | | | | A common coalescing conflict in vector code is lane insertion: %dst = FOO %src = BAR %dst:ssub0 = COPY %src The live range of %src interferes with the ssub0 lane of %dst, but that lane is never read after %src would have clobbered it. That makes it safe to merge the live ranges and eliminate the COPY: %dst = FOO %dst:ssub0 = BAR This patch teaches the new coalescer to resolve conflicts where dead vector lanes would be clobbered, at least as long as the clobbered vector lanes don't escape the basic block. llvm-svn: 164250
* comment typoAndrew Trick2012-09-181-1/+1
| | | | llvm-svn: 164180
* TargetSchedule: cleanup computeOperandLatency logic & diagnostics.Andrew Trick2012-09-181-6/+16
| | | | llvm-svn: 164154
* misched: Make ScheduleDAGInstrs use the TargetSchedule interface.Andrew Trick2012-09-181-16/+14
| | | | llvm-svn: 164153
* When creating MCAsmBackend pass the CPU string as well. In X86AsmBackendRoman Divacky2012-09-181-3/+3
| | | | | | | | | store this and use it to not emit long nops when the CPU is geode which doesnt support them. Fixes PR11212. llvm-svn: 164132
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-182-7/+147
| | | | llvm-svn: 164098
* Mark unimplemented copy constructors and copy assignment operators as ↵Craig Topper2012-09-181-2/+2
| | | | | | LLVM_DELETED_FUNCTION. llvm-svn: 164090
* Fix some funky indentation.Evan Cheng2012-09-181-18/+17
| | | | llvm-svn: 164087
* Merge into undefined lanes under -new-coalescer.Jakob Stoklund Olesen2012-09-172-2/+120
| | | | | | | | | | | | | | | | | Add LIS::pruneValue() and extendToIndices(). These two functions are used by the register coalescer when merging two live ranges requires more than a trivial value mapping as supported by LiveInterval::join(). The pruneValue() function can remove the part of a value number that is going to conflict in join(). Afterwards, extendToIndices can restore the live range, using any new dominating value numbers and updating the SSA form. Use this complex value mapping to support merging a register into a vector lane that has a conflicting value, but the clobbered lane is undef. llvm-svn: 164074
* Stop adding <imp-def> operands when expanding REG_SEQUENCE.Jakob Stoklund Olesen2012-09-171-4/+0
| | | | | | | | | | These extra operands are not needed by register allocators using VirtRegRewriter, and RAFast don't need them any longer. By omitting the <imp-def> operands, it becomes possible for the new register coalescer to track which lanes are valid and which are undef. llvm-svn: 164073
* Revert r164061-r164067. Most of the new subtarget emitter.Andrew Trick2012-09-172-147/+7
| | | | | | | I have to work out the Target/CodeGen header dependencies before putting this back. llvm-svn: 164072
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-172-7/+147
| | | | llvm-svn: 164065
* Increase the static sizes of some SmallSets. finalizeBundle() is very ↵Michael Ilseman2012-09-171-4/+4
| | | | | | frequently called for some backends, and growing into an std::set is overkill for these numbers. llvm-svn: 164044
* whitespaceMichael Ilseman2012-09-171-1/+1
| | | | llvm-svn: 164043
* Fix PR13859Michael Liao2012-09-171-6/+7
| | | | | | | - Preserve the original NOutVT during casting from vector to integer by extracting vector elements. llvm-svn: 164042
* Add a MachinePostDominator passTom Stellard2012-09-173-0/+57
| | | | | | This is used in the AMDIL and R600 backends. llvm-svn: 164029
* Disable the protection from escaped allocas in an attempt to find violating ↵Nadav Rotem2012-09-171-2/+1
| | | | | | passes. This may break the buildbots. I plan to revert it in a few hours. llvm-svn: 164024
* Fix bad comment. No functional change.Craig Topper2012-09-161-1/+1
| | | | llvm-svn: 164000
* Add alternative coalescing algorithm under a flag.Jakob Stoklund Olesen2012-09-161-0/+478
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The live range of an SSA value forms a sub-tree of the dominator tree. That means the live ranges of two values overlap if and only if the def of one value lies within the live range of the other. This can be used to simplify the interference checking a bit: Visit each def in the two registers about to be joined. Check for interference against the value that is live in the other register at the def point only. It is not necessary to scan the set of overlapping live ranges, this interference check can be done while computing the value mapping required for the final live range join. The new algorithm is prepared to handle more complicated conflict resolution - We can allow overlapping live ranges with different values as long as the differing lanes are undef or unused in the other register. The implementation in this patch doesn't do that yet, it creates code that is nearly identical to the old algorithm's, except: - The new stripCopies() function sees through multiple copies while the old RegistersDefinedFromSameValue() only can handle one. - There are a few rare cases where the new algorithm can erase an IMPLICIT_DEF instuction that RegistersDefinedFromSameValue() couldn't handle. llvm-svn: 163991
* Use LLVM_DELETED_FUNCTION in place of 'DO NOT IMPLEMENT' comments.Craig Topper2012-09-153-6/+6
| | | | llvm-svn: 163974
* Don't depend on kill flags in removeCopyByCommutingDef().Jakob Stoklund Olesen2012-09-151-1/+1
| | | | | | | Kill flags are removed more and more aggressively during the register allocation passes, it is better to get information from LiveIntervals. llvm-svn: 163972
* TargetSchedModel interface. To be implemented...Andrew Trick2012-09-142-0/+33
| | | | llvm-svn: 163934
* misched: add a hook for custom DAG postprocessing.Andrew Trick2012-09-141-0/+9
| | | | llvm-svn: 163915
* Remove silly dead store. Patch by Ettl Martin.Duncan Sands2012-09-141-2/+1
| | | | llvm-svn: 163882
* Fix both the test for zero and what we do if we have a zero forEric Christopher2012-09-131-1/+4
| | | | | | | | umulo legalization. Fixes PR13839 llvm-svn: 163856
* Reformat, remove a couple unused variables and move some variablesEric Christopher2012-09-131-8/+8
| | | | | | closer to where they're needed. llvm-svn: 163855
* Enhance type legalization on bitcast from vector to integerMichael Liao2012-09-131-5/+34
| | | | | | | | - Find a legal vector type before casting and extracting element from it. - As the new vector type may have more than 2 elements, build the final hi/lo pair by BFS pairing them from bottom to top. llvm-svn: 163830
* Rename the flag which protects from escaped allocas, which may come from ↵Nadav Rotem2012-09-131-5/+12
| | | | | | bugs in user code or in the compiler. Also, dont assert if the protection is not enabled. llvm-svn: 163807
* Fix a dagcombine optimization. The optimization attempts to optimize a ↵Nadav Rotem2012-09-131-1/+2
| | | | | | | | | | | bitcast of fneg to integers by xoring the high-bit. This fails if the source operand is a vector because we need to negate each of the elements in the vector. Fix rdar://12281066 PR13813. llvm-svn: 163802
* Fix a typo.Nadav Rotem2012-09-131-1/+1
| | | | llvm-svn: 163801
* Stack Coloring: We have code that checks that all of the uses of allocasNadav Rotem2012-09-131-5/+17
| | | | | | | | | | | | | are within the lifetime zone. Sometime legitimate usages of allocas are hoisted outside of the lifetime zone. For example, GEPS may calculate the address of a member of an allocated struct. This commit makes sure that we only check (abort regions or assert) for instructions that read and write memory using stack frames directly. Notice that by allowing legitimate usages outside the lifetime zone we also stop checking for instructions which use derivatives of allocas. We will catch less bugs in user code and in the compiler itself. llvm-svn: 163791
* Recommit, with fixes:Eric Christopher2012-09-123-1/+24
| | | | | | | | | | | Add some support for dealing with an object pointer on arguments. Part of rdar://9797999 which now supports adding the object pointer attribute to the subprogram as it should. llvm-svn: 163754
* Fix PR11985Michael Liao2012-09-124-5/+18
| | | | | | | | | | | - BlockAddress has no support of BA + offset form and there is no way to propagate that offset into machine operand; - Add BA + offset support and a new interface 'getTargetBlockAddress' to simplify target block address forming; - All targets are modified to use new interface and X86 backend is enhanced to support BA + offset addressing. llvm-svn: 163743
* Remove an overly-aggressive assertion. The code following this assertion ↵Owen Anderson2012-09-121-2/+0
| | | | | | already knows how to handle the case where DstRC was NULL, so it's not actually protecting us from anything, and this pattern can come up when using unknown_class operands in the SelectionDAG. llvm-svn: 163736
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